We are developing our own risc-v so we need to have to ability to modify openocd. Here is the quickest guide for you to start

• Git clone https://gitlab.com/quantr/toolchain/openocd.git
• Follow the README.md to build the openocd, then you have the executable in /opt/openocd/bin/openocd
• Run it by “/opt/openocd/bin/openocd -f quantr.cfg” in the cloned openocd folder, then you see our dummy driver is loaded and printed some messages, there is <file>:<line no> info in your console messages

• Below is the quantr.cfg

debug_level 4
source [find interface/dummy.cfg]
adapter speed 2000
set _ENDIAN little
set _CHIPNAME quantr
set _TARGETNAME $_CHIPNAME.cpu
#target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME

jtag newtap quantr cpu -irlen 5
target create quantr quantr -chain-position 0

• Open a new console and run “riscv64-unknown-elf-gdb”, then “target remote :3333”, so you can see risc-v gdb is connect to our openocd with our dummy driver

• Type “info registers”, you can see our custom value 0x123456789abcdef is fitted into the registers s1

when you type “set $s1=0xaabb”, it will jump to here

2023/04/12 by admin