This graph generated by graphviz, helping students easier understand Professor Jim Huang’s SEMU RISC-V emulator 2023/02/27

啲人問點解香港SI界唔係好似歐美咁，代理隻product跟著自己改裝，跟住越改越advance，咁就要由SI界嘅本質講起 香港SI嘅本質就係做trade 香港係轉口港，香港嘅SI本質無異，兩個字講哂就係做trade，姐係做買賣，左手入貨右手出貨。用一個好啲嘅比喻，SI就好似百老匯，入左啲冷氣你要咪送去你屋企裝囉。唔同嘅只係做嘅客係公司客，賣嘅貨係專業啲咁解。做trade無問題，賺到錢嘅生意就係好生意，香港做得大嘅IT公司基本上都係做trade。如果認清左個本質，咁你就會解釋到呢幾件事 2023/02/13

講得好step by step 2023/02/10

After hacking the qemu risc-v source code, here is the PLIC call map 2023/02/06

2023/02/06

Created the library to export our data structure into logisim, https://gitlab.com/quantr/eda/logisim-library , part of our EDA tool 2023/02/04

The first step of logic synthesis is call “HDL synthesis”, converting verilog into raw netlist. http://ebook.pldworld.com/_eBook/FPGA%EF%BC%8FHDL/-Eng-/Verilog%20HDL%20Synthesis.%20A%20Practical%20Primet%20%28Bhasker%29.pdf 2023/02/01