Never use Baidu Cloud Disk
2021-01-25
Simple reaons, upload is fast, download only. few ten KB/s. It looks like Baidu don’t want you to download your file, locking you in forever
Solved : C# Azure functions in vs
If your c# azure functions project in visual studio has error : “There is no Functions runtime available that matches the version specified in the project.”. Do this : Click : Download & Install 2024-11-20 17:41:01
If your c# azure functions project in visual studio has error : "There is no Functions runtime available that matches the version specified in the project.". Do this :
Click : Download & Install
Port forward port 22 into WSL ubuntu
Run this command in windows host 2024-11-19 13:13:29
Run this command in windows host 2024-11-19 13:13:29
Run this command in windows host
netsh interface portproxy add v4tov4 listenport=22 listenaddress=0.0.0.0 connectport=22 connectaddress=<wsl ubuntu ip>
PhpIsDead framework init idea
2024-11-18 19:31:29
Add -g option to riscv-tests
To enable debug, “CFLAGS=-g ./configure” won’t work, edit ./isa/Makefile and add -g to variable RISCV_GCC_OPTS then it works. The dump file won’t show debug info, run “riscv64-unknown-elf-objdump -DS rv64ui-v-addi” then you see it 2024-11-17 16:37:34
To enable debug, "CFLAGS=-g ./configure" won't work, edit ./isa/Makefile and add -g to variable RISCV_GCC_OPTS then it works.
The dump file won't show debug info, run "riscv64-unknown-elf-objdump -DS rv64ui-v-addi" then you see it
How laravel can inject function to object in their ORM
The technique they have used are “trait“, “magic function” and “call_user_func_array“. The whole thing work in runtime, not compile time. 1. Php trait PHP trait is just like copy and paste the code from trait into the injected class. 2. Magic function When calling a not exist function, the __call function will be called. Laravel […] 2024-11-17 11:20:03
The technique they have used are "trait", "magic function" and "call_user_func_array". The whole thing work in runtime, not compile time.
1. Php trait
PHP trait is just like copy and paste the code from trait into the injected class.
2. Magic function
When calling a not exist function, the __call function will be called. Laravel is using library Macroable, so in the code, when you are calling a non exist function on an object, the __call will be called and try to call the real function by call_user_func_array
dhrystone compile issue in riscv-tests
this problem happens in both mac and ubuntu /home/peter/workspace/riscv-tests/benchmarks/dhrystone/dhrystone.c:20:1: error: return type defaults to ‘int’ [-Wimplicit-int] Fixed is here https://github.com/riscv-software-src/riscv-tests/compare/master…pratikkedar:riscv-tests:pratik-test 2024-11-07 20:21:41
this problem happens in both mac and ubuntu
/home/peter/workspace/riscv-tests/benchmarks/dhrystone/dhrystone.c:20:1: error: return type defaults to 'int' [-Wimplicit-int]
Fixed is here https://github.com/riscv-software-src/riscv-tests/compare/master...pratikkedar:riscv-tests:pratik-test
Code magazine statistics
Total page Total article Editorial (no of page) Longest article (no of page) Advertisement (no of page) 2024 Nov Dec 76 11 1 14 5 2024 Sep Oct 76 12 1 25 8 2024-11-01 22:50:06
Total page Total article Editorial (no of page) Longest article (no of page) Advertisement (no of page) 2024 Nov Dec 76 11 1 14 5 2024 Sep Oct 76 12 1 25 8 2024-11-01 22:50:06
| Total page | Total article | Editorial (no of page) | Longest article (no of page) | Advertisement (no of page) | |
| 2024 Nov Dec | 76 | 11 | 1 | 14 | 5 |
| 2024 Sep Oct | 76 | 12 | 1 | 25 | 8 |
Resolved: unable to push to gitlab
if you meet this problem: fatal: the remote end hung up unexpectedly Do this: 2024-10-31 19:19:00
if you meet this problem: fatal: the remote end hung up unexpectedly
Do this:
git config --global http.postBuffer 157286400
This book is totally outdated
This book is totally outdated because the official facebook PHP SDK is already deprecated. Now we should go for facebook javascript SDK 2024-10-31 00:41:46
This book is totally outdated because the official facebook PHP SDK is already deprecated. Now we should go for facebook javascript SDK
Good bye THEi
2024-10-30 23:37:24
香港編程界必須「代碼脫亞入歐, 工作脫港入陸」
「代碼脫亞入歐」這一概念可以從幾個方面來理解，特別是在香港的編程界與日本的明治維新之間進行比較。 1. 歷史背景 2. 技術與創新 3. 教育與培訓 4. 政策支持 5. 文化與思維轉變 總結來說，「代碼脫亞入歐」不僅是技術上的轉型，更是一種思維方式和文化的變革。香港的編程界若能學習日本明治維新的經驗，將能在全球化的浪潮中更好地立足與發展。 2024-10-27 23:57:44
「代碼脫亞入歐」這一概念可以從幾個方面來理解，特別是在香港的編程界與日本的明治維新之間進行比較。 1. 歷史背景 2. 技術與創新 3. 教育與培訓 4. 政策支持 5. 文化與思維轉變 總結來說，「代碼脫亞入歐」不僅是技術上的轉型，更是一種思維方式和文化的變革。香港的編程界若能學習日本明治維新的經驗，將能在全球化的浪潮中更好地立足與發展。 2024-10-27 23:57:44
「代碼脫亞入歐」這一概念可以從幾個方面來理解，特別是在香港的編程界與日本的明治維新之間進行比較。
1. 歷史背景
- 明治維新：日本在19世紀中期至20世紀初的這場運動，旨在現代化國家，學習西方的技術和制度，從而提升國際競爭力。
- 香港編程界：香港的科技和編程文化需要吸收更多的國際元素，特別是西方先進的技術和創新思維。
2. 技術與創新
- 學習與引進：香港的程序員可以借鑒日本在技術引進和創新方面的成功經驗，積極學習全球最新的編程語言、開發工具和框架。
- 開源文化：推動開源項目和社區的發展，學習如何在全球範圍內合作和交流。
3. 教育與培訓
- 強化教育體系：借鑒日本的教育模式，提升編程教育的質量，例如加強STEM（科學、技術、工程和數學）教育。
- 實踐與實驗：鼓勵學生參加實習和實驗項目，增強實際操作能力。
4. 政策支持
- 政府角色：香港政府可以效仿日本的政策，創造良好的創新環境，支持初創企業和技術發展。
- 資金與投資：提供資助和資源，吸引更多國際企業和人才。
5. 文化與思維轉變
- 全球視野：推動編程文化向國際化轉型，培養開放和包容的心態。
- 創新思維：鼓勵創新和實驗，推動跨界合作，促進多元化的思維方式。
總結來說，「代碼脫亞入歐」不僅是技術上的轉型，更是一種思維方式和文化的變革。香港的編程界若能學習日本明治維新的經驗，將能在全球化的浪潮中更好地立足與發展。
H2 hex function
This will select value in hex format, beware the bit width, otherwise it wrap to zero 2024-10-27 14:29:17
This will select value in hex format, beware the bit width, otherwise it wrap to zero
SELECT SEQUENCE, RAWTOHEX(CAST(pc AS BINARY(8))), line FROM QUANTR ORDER BY SEQUENCE
我估實相係咁 ： 時間係亂序執行
1. 時間係亂序執行，否則佛教不能自圓其說。只要亂序執行講得通，佛教整套哲學體系就會自己渝合。而家佛教哲學有幾個不能接合嘅地方，第一就係講所有野係空，但又因緣生。第二就係佛教嘅神通如果係真，根本容唔落係自己套哲學體系裏面。就算講得最清楚嘅龍樹，都只不過係話當「果」出現時，「因」先會被確定。如果時間係線性，呢單野根本完全唔合理，但如果時間就亂序執行，咁就好正確。因為係呢一對事物「因」＋「果」佢地嘅時間當然係順序執行，但跳出左呢一對事物，佢地嘅時間線就唔係，所以係佢地時間線黎講果要出現左，因先可以成立。企左出去佢地嘅時間線，其實係果先出現，再到因。我再舉多個你地可以睇到嘅例子。int x; x=123. 呢兩句code，你地用verilator synthesis出logic gate，係呢兩句code嘅時間線上先有int x，先可以有x=123. 但其實係int x之前，係另一條時間線，x已經存在，所以果出現時，姐係int x出現時，佢個因x先被確立。乎合龍樹所講嘅野。古人因為科技所限，無法舉證。 2. 時間係唔係線性，而亂序執行唔會阻擋世情嘅出現。我地感受到時間係線性，因為只係我地要靠時間去圍持呢個身體同識。舉個實制例子，CPU係亂序執行，但被執行嘅program會以為自己嘅時間線係線性，但其實唔係。只係CPU唔會張下一句指令嘅執行結果話比上一句嘅指令知，最終令到program以為自己條時間線有如河流一樣線性。 2024-10-20 01:08:53
1. 時間係亂序執行，否則佛教不能自圓其說。只要亂序執行講得通，佛教整套哲學體系就會自己渝合。而家佛教哲學有幾個不能接合嘅地方，第一就係講所有野係空，但又因緣生。第二就係佛教嘅神通如果係真，根本容唔落係自己套哲學體系裏面。就算講得最清楚嘅龍樹，都只不過係話當「果」出現時，「因」先會被確定。如果時間係線性，呢單野根本完全唔合理，但如果時間就亂序執行，咁就好正確。因為係呢一對事物「因」＋「果」佢地嘅時間當然係順序執行，但跳出左呢一對事物，佢地嘅時間線就唔係，所以係佢地時間線黎講果要出現左，因先可以成立。企左出去佢地嘅時間線，其實係果先出現，再到因。我再舉多個你地可以睇到嘅例子。int x; x=123. 呢兩句code，你地用verilator synthesis出logic gate，係呢兩句code嘅時間線上先有int x，先可以有x=123. 但其實係int x之前，係另一條時間線，x已經存在，所以果出現時，姐係int x出現時，佢個因x先被確立。乎合龍樹所講嘅野。古人因為科技所限，無法舉證。 2. 時間係唔係線性，而亂序執行唔會阻擋世情嘅出現。我地感受到時間係線性，因為只係我地要靠時間去圍持呢個身體同識。舉個實制例子，CPU係亂序執行，但被執行嘅program會以為自己嘅時間線係線性，但其實唔係。只係CPU唔會張下一句指令嘅執行結果話比上一句嘅指令知，最終令到program以為自己條時間線有如河流一樣線性。 2024-10-20 01:08:53
1. 時間係亂序執行，否則佛教不能自圓其說。只要亂序執行講得通，佛教整套哲學體系就會自己渝合。而家佛教哲學有幾個不能接合嘅地方，第一就係講所有野係空，但又因緣生。第二就係佛教嘅神通如果係真，根本容唔落係自己套哲學體系裏面。就算講得最清楚嘅龍樹，都只不過係話當「果」出現時，「因」先會被確定。如果時間係線性，呢單野根本完全唔合理，但如果時間就亂序執行，咁就好正確。因為係呢一對事物「因」＋「果」佢地嘅時間當然係順序執行，但跳出左呢一對事物，佢地嘅時間線就唔係，所以係佢地時間線黎講果要出現左，因先可以成立。企左出去佢地嘅時間線，其實係果先出現，再到因。我再舉多個你地可以睇到嘅例子。int x; x=123. 呢兩句code，你地用verilator synthesis出logic gate，係呢兩句code嘅時間線上先有int x，先可以有x=123. 但其實係int x之前，係另一條時間線，x已經存在，所以果出現時，姐係int x出現時，佢個因x先被確立。乎合龍樹所講嘅野。古人因為科技所限，無法舉證。
2. 時間係唔係線性，而亂序執行唔會阻擋世情嘅出現。我地感受到時間係線性，因為只係我地要靠時間去圍持呢個身體同識。舉個實制例子，CPU係亂序執行，但被執行嘅program會以為自己嘅時間線係線性，但其實唔係。只係CPU唔會張下一句指令嘅執行結果話比上一句嘅指令知，最終令到program以為自己條時間線有如河流一樣線性。
Resize ext4 inside ubuntu and virtualbox with lvm
2024-10-11 10:58:36
parted resizepart 3 -0 quit pvs pvresize /dev/sda3 lvextend -l+100%FREE /dev/ubuntu-vg/ubuntu-lv resize2fs /dev/ubuntu-vg/ubuntu-lv
Azure CDN SAS token expired will give you wrong error message
Azure CDN SAS token expired will give you wrong error message of the expired period 2024-10-08 16:42:02
Azure CDN SAS token expired will give you wrong error message of the expired period
Resolved : Mac pip unable to get local issuer certificate
WARNING: Retrying (Retry(total=4, connect=None, read=None, redirect=None, status=None)) after connection broken by ‘SSLError(SSLCertVerificationError(1, ‘[SSL: CERTIFICATE_VERIFY_FAILED] certificate verify failed: unable to get local issuer certificate (_ssl.c:992)’))’: /simple/matplotlib/ 2024-10-08 02:10:34
WARNING: Retrying (Retry(total=4, connect=None, read=None, redirect=None, status=None)) after connection broken by ‘SSLError(SSLCertVerificationError(1, ‘[SSL: CERTIFICATE_VERIFY_FAILED] certificate verify failed: unable to get local issuer certificate (_ssl.c:992)’))’: /simple/matplotlib/ 2024-10-08 02:10:34
WARNING: Retrying (Retry(total=4, connect=None, read=None, redirect=None, status=None)) after connection broken by 'SSLError(SSLCertVerificationError(1, '[SSL: CERTIFICATE_VERIFY_FAILED] certificate verify failed: unable to get local issuer certificate (_ssl.c:992)'))': /simple/matplotlib/
python -m pip install something --trusted-host pypi.python.org --trusted-host files.pythonhosted.org --trusted-host pypi.org
Statistics formula in Excel
2024-10-02 18:59:08
HKPS First RISC-V Board
2024-09-28 23:18:40
Weact Logic Analyzer
https://github.com/WeActStudio/LogicAnalyzerV1 2024-08-27 17:17:57
Remove old node_modules
2024-08-08 11:00:34
2024-08-08 11:00:34
ls -tr|head -50|while read a; do echo $a; rm -fr $a/node_modules; done
M2/M3 hole size
https://www.accu.co.uk/p/117-iso-metric-thread-dimensions Bolt Sizes Chart & Metric Bolt Dimensions THREAD SIZE MAJOR DIAMETER (MM) MINOR DIAMETER (MM) THREAD PITCH (MM) PITCHDIAMETER(MM) TAPPINGDRILL DIAMETER(MM) CLEARANCEHOLE DIAMETER(MM) M1 1.0 0.729 0.25 0.838 0.75 1.3 M1.1 1.1 0.829 0.25 0.938 0.85 1.4 M1.2 1.2 0.929 0.25 1.038 0.95 1.5 M1.4 1.4 1.075 0.30 1.205 1.10 1.8 M1.6 1.6 1.221 […] 2024-07-31 19:38:39
https://www.accu.co.uk/p/117-iso-metric-thread-dimensions Bolt Sizes Chart & Metric Bolt Dimensions THREAD SIZE MAJOR DIAMETER (MM) MINOR DIAMETER (MM) THREAD PITCH (MM) PITCHDIAMETER(MM) TAPPINGDRILL DIAMETER(MM) CLEARANCEHOLE DIAMETER(MM) M1 1.0 0.729 0.25 0.838 0.75 1.3 M1.1 1.1 0.829 0.25 0.938 0.85 1.4 M1.2 1.2 0.929 0.25 1.038 0.95 1.5 M1.4 1.4 1.075 0.30 1.205 1.10 1.8 M1.6 1.6 1.221 […] 2024-07-31 19:38:39
https://www.accu.co.uk/p/117-iso-metric-thread-dimensions
Bolt Sizes Chart & Metric Bolt Dimensions
| THREAD SIZE | MAJOR DIAMETER (MM) | MINOR DIAMETER (MM) | THREAD PITCH (MM) | PITCH DIAMETER (MM) | TAPPING DRILL DIAMETER (MM) | CLEARANCE HOLE DIAMETER (MM) |
|---|---|---|---|---|---|---|
| M1 | 1.0 | 0.729 | 0.25 | 0.838 | 0.75 | 1.3 |
| M1.1 | 1.1 | 0.829 | 0.25 | 0.938 | 0.85 | 1.4 |
| M1.2 | 1.2 | 0.929 | 0.25 | 1.038 | 0.95 | 1.5 |
| M1.4 | 1.4 | 1.075 | 0.30 | 1.205 | 1.10 | 1.8 |
| M1.6 | 1.6 | 1.221 | 0.35 | 1.373 | 1.25 | 2.0 |
| M1.8 | 1.8 | 1.421 | 0.35 | 1.573 | 1.45 | 2.3 |
| M2 | 2.0 | 1.567 | 0.40 | 1.740 | 1.60 | 2.6 |
| M2.2 | 2.2 | 1.713 | 0.45 | 1.908 | 1.75 | 2.9 |
| M2.5 | 2.5 | 2.013 | 0.45 | 2.208 | 2.05 | 3.1 |
| M3 | 3.0 | 2.459 | 0.50 | 2.675 | 2.50 | 3.6 |
| M3.5 | 3.5 | 2.850 | 0.60 | 3.110 | 2.90 | 4.2 |
| M4 | 4.0 | 3.242 | 0.70 | 3.545 | 3.30 | 4.8 |
| M4.5 | 4.5 | 3.688 | 0.75 | 4.013 | 3.80 | 5.3 |
| M5 | 5.0 | 4.134 | 0.80 | 4.480 | 4.20 | 5.8 |
| M6 | 6.0 | 4.917 | 1.00 | 5.350 | 5.00 | 7.0 |
| M7 | 7.0 | 5.917 | 1.00 | 6.350 | 6.00 | 8.0 |
| M8 | 8.0 | 6.647 | 1.25 | 7.188 | 6.80 | 10.0 |
| M9 | 9.0 | 7.647 | 1.25 | 8.188 | 7.80 | 11.0 |
| M10 | 10.0 | 8.376 | 1.50 | 9.026 | 8.50 | 12.0 |
| M11 | 11.0 | 9.376 | 1.50 | 10.026 | 9.50 | 13.5 |
| M12 | 12.0 | 10.106 | 1.75 | 10.863 | 10.20 | 15.0 |
| M14 | 14.0 | 11.835 | 2.00 | 12.701 | 12.00 | 17.0 |
| M16 | 16.0 | 13.835 | 2.00 | 14.701 | 14.00 | 19.0 |
| M18 | 18.0 | 15.394 | 2.50 | 16.376 | 15.50 | 22.0 |
| M20 | 20.0 | 17.294 | 2.50 | 18.376 | 17.50 | 24.0 |
| M22 | 22.0 | 19.294 | 2.50 | 20.376 | 19.50 | 26.0 |
| M24 | 24.0 | 20.752 | 3.00 | 22.051 | 21.00 | 28.0 |
| M27 | 27.0 | 23.752 | 3.00 | 25.051 | 24.00 | 33.0 |
| M30 | 30.0 | 26.211 | 3.50 | 27.727 | 26.50 | 35.0 |
| M33 | 33.0 | 29.211 | 3.50 | 30.727 | 29.50 | 38 |
| M36 | 36.0 | 31.670 | 4.00 | 33.402 | 32.00 | 41 |
| M39 | 39.0 | 34.670 | 4.00 | 36.402 | 35.00 | 44 |
| M42 | 42.0 | 37.129 | 4.50 | 39.077 | 37.50 | 47 |
| M45 | 45.0 | 40.129 | 4.50 | 42.077 | 40.50 | 50 |
| M48 | 48.0 | 42.857 | 5.00 | 44.752 | 43.00 | 53 |
| M52 | 52.0 | 46.587 | 5.00 | 48.752 | 47.00 | 57 |
| M56 | 56.0 | 50.046 | 5.50 | 52.428 | 50.50 | 61 |
| M60 | 60.0 | 54.046 | 5.50 | 56.428 | 54.50 | 65 |
| M64 | 64.0 | 57.505 | 6.00 | 60.103 | 58.00 | 69 |
| M68 | 68.0 | 61.505 | 6.00 | 64.103 | 62.00 | 73 |
A simple hex dump for dns request and response
2024-07-27 23:01:26
2024-07-27 23:01:26
165 23.534334 192.168.10.115 218.255.142.226 DNS 70 Standard query 0x1644 A quantr.com 0000 b4 75 0e 66 6c f2 78 4f 43 9c 8c 15 08 00 45 00 .u.fl.xOC.....E. 0010 00 38 67 33 00 00 40 11 de 84 c0 a8 0a 73 da ff [email protected].. 0020 8e e2 ff e6 00 35 00 24 86 8b 16 44 01 00 00 01 .....5.$...D.... 0030 00 00 00 00 00 00 06 71 75 61 6e 74 72 03 63 6f .......quantr.co 0040 6d 00 00 01 00 01 m..... 166 23.538999 218.255.142.226 192.168.10.115 DNS 86 Standard query response 0x1644 A quantr.com A 218.255.142.226 0000 78 4f 43 9c 8c 15 b4 75 0e 66 6c f2 08 00 45 00 xOC....u.fl...E. 0010 00 48 3a cf 00 00 37 11 13 d9 da ff 8e e2 c0 a8 .H:...7......... 0020 0a 73 00 35 ff e6 00 34 86 f3 16 44 85 00 00 01 .s.5...4...D.... 0030 00 01 00 00 00 00 06 71 75 61 6e 74 72 03 63 6f .......quantr.co 0040 6d 00 00 01 00 01 c0 0c 00 01 00 01 00 01 51 80 m.............Q. 0050 00 04 da ff 8e e2 ......
Mac command to view all opened port
2024-07-19 12:16:34
netstat -anvp tcp | awk 'NR<3 || /LISTEN/'|sort -k 4
All the gates I have
2024-07-08 13:33:07
如果想知道容器嘅原理
如果想知道容器嘅原理，我圈起左 2024-07-01 15:13:29
如果想知道容器嘅原理，我圈起左
Simplest standalone ApacheDS server
This code run a standalone ApacheDS server, you can use ApacheDS studio to connect to it, it host localhost:10389 pom.xml Then you can connect it by ApacheDS Studio 2024-06-09 23:26:37
This code run a standalone ApacheDS server, you can use ApacheDS studio to connect to it, it host localhost:10389
package hk.quantr.apachedsembeddedserver; import java.io.File; import java.io.IOException; import java.util.List; import org.apache.directory.api.ldap.model.constants.SchemaConstants; import org.apache.directory.api.ldap.model.schema.LdapComparator; import org.apache.directory.api.ldap.model.schema.comparators.NormalizingComparator; import org.apache.directory.api.ldap.model.schema.registries.ComparatorRegistry; import org.apache.directory.api.ldap.model.schema.registries.SchemaLoader; import org.apache.directory.api.ldap.schema.extractor.SchemaLdifExtractor; import org.apache.directory.api.ldap.schema.extractor.impl.DefaultSchemaLdifExtractor; import org.apache.directory.api.ldap.schema.loader.LdifSchemaLoader; import org.apache.directory.api.ldap.schema.manager.impl.DefaultSchemaManager; import org.apache.directory.server.constants.ServerDNConstants; import org.apache.directory.server.core.DefaultDirectoryService; import org.apache.directory.server.core.api.InstanceLayout; import org.apache.directory.server.core.api.partition.Partition; import org.apache.directory.server.core.api.schema.SchemaPartition; import org.apache.directory.server.core.factory.JdbmPartitionFactory; import org.apache.directory.server.core.partition.ldif.LdifPartition; import org.apache.directory.server.ldap.LdapServer; import org.apache.directory.server.protocol.shared.transport.TcpTransport; import org.apache.directory.server.protocol.shared.transport.Transport; /** * * @author Peter <[email protected]> */ public class ApacheDSEmbeddedServer { public static void main(String[] args) throws ClassNotFoundException, Exception { DefaultDirectoryService directoryService = new DefaultDirectoryService(); File workingDirector = new File("working_dir"); InstanceLayout instanceLayout = new InstanceLayout(workingDirector); directoryService.setInstanceLayout(instanceLayout); File schemaRepository = new File(workingDirector.getName(), "schema"); SchemaLdifExtractor extractor = new DefaultSchemaLdifExtractor(workingDirector); try { extractor.extractOrCopy(); } catch (IOException ioe) { // The schema has already been extracted, bypass } SchemaLoader loader = new LdifSchemaLoader(schemaRepository); DefaultSchemaManager schemaManager = new DefaultSchemaManager(loader); schemaManager.loadAllEnabled(); ComparatorRegistry comparatorRegistry = schemaManager.getComparatorRegistry(); for (LdapComparator<?> comparator : comparatorRegistry) { if (comparator instanceof NormalizingComparator) { ((NormalizingComparator) comparator).setOnServer(); } } directoryService.setSchemaManager(schemaManager); // Init the schema partation LdifPartition ldifPartition = new LdifPartition(schemaManager, directoryService.getDnFactory()); ldifPartition.setPartitionPath(new File(workingDirector.getName(), "schema").toURI()); SchemaPartition schemaPartition = new SchemaPartition(schemaManager); schemaPartition.setWrappedPartition(ldifPartition); directoryService.setSchemaPartition(schemaPartition); List<Throwable> errors = schemaManager.getErrors(); // Inject the System Partition JdbmPartitionFactory partitionFactory = new JdbmPartitionFactory(); Partition systemPartition = partitionFactory.createPartition(directoryService.getSchemaManager(), directoryService.getDnFactory(), "system", ServerDNConstants.SYSTEM_DN, 500, new File(directoryService.getInstanceLayout().getPartitionsDirectory(), "system")); systemPartition.setSchemaManager(directoryService.getSchemaManager()); partitionFactory.addIndex(systemPartition, SchemaConstants.OBJECT_CLASS_AT, 100); directoryService.setSystemPartition(systemPartition); // schemaManager.loadAllEnabled(); // SchemaPartition schemaPartition = new SchemaPartition(schemaManager); // directoryService.setSchemaPartition(schemaPartition); LdapServer ldapServer = new LdapServer(); ldapServer.setDirectoryService(directoryService); ldapServer.setServiceName("DefaultLDAP"); Transport ldap = new TcpTransport("0.0.0.0", 10389, 3, 5); ldapServer.addTransports(ldap); // LdifFileLoader ldifLoader = new LdifFileLoader(directoryService.getAdminSession(), "users.ldif"); // ldifLoader.execute(); directoryService.startup(); ldapServer.start(); } }
pom.xml
<?xml version="1.0" encoding="UTF-8"?> <project xmlns="http://maven.apache.org/POM/4.0.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 http://maven.apache.org/xsd/maven-4.0.0.xsd"> <modelVersion>4.0.0</modelVersion> <groupId>hk.quantr</groupId> <artifactId>ApacheDSEmbeddedServer</artifactId> <version>1.0</version> <packaging>jar</packaging> <name>ApacheDS Embedded Server</name> <properties> <project.build.sourceEncoding>UTF-8</project.build.sourceEncoding> <maven.compiler.source>21</maven.compiler.source> <maven.compiler.target>21</maven.compiler.target> <exec.mainClass>hk.quantr.apachedsembeddedserver.ApacheDSEmbeddedServer</exec.mainClass> </properties> <dependencies> <dependency> <groupId>org.apache.directory.server</groupId> <artifactId>apacheds-all</artifactId> <version>2.0.0.AM27</version> </dependency> </dependencies> </project>
Then you can connect it by ApacheDS Studio
THEi課程體驗日2024/05/24
教中學生玩STM32開發板，感覺到佢地開心 2024-05-25 22:08:48
教中學生玩STM32開發板，感覺到佢地開心
How to make your netbeans more beautiful
Set to a better font size 4. Set the color 2024-04-27 13:46:56
Set to a better font size
- download jetbrain font https://www.jetbrains.com/lp/mono/ , unzip it, click to all ttf file to install the fonts
- restart netbeans
- set it
4. Set the color
IoT sensors
2024-04-14 16:29:48
Good ELF diagram
http://blog.k3170makan.com/2018/10/introduction-to-elf-format-part-vi.html 2024-04-13 18:12:48
Fixed dwarf bug
When i change kernelvec.S to -ggdb, my dwarf library broken but now fixed. Commit :e640c3d9 And I still don’t understand why .S won’t be an compile unit in dwarf, why design like that. 2024-04-09 21:49:51
When i change kernelvec.S to -ggdb, my dwarf library broken but now fixed. Commit :e640c3d9
And I still don't understand why .S won't be an compile unit in dwarf, why design like that.
Quantr Dwarf Library - Print address/lineNo/ColNo from specific address
2024-04-07 22:14:20
2024-04-07 22:14:20
File elf = new File(cmd.getOptionValue("i").replaceFirst("^~", System.getProperty("user.home")));
System.out.println(elf.getAbsolutePath());
final ArrayList<Dwarf> dwarfArrayList = DwarfLib.init(elf, 0, false);
long address = 0x8000002al;
List<VariableWithAddress> variableWithAddresses = new ArrayList<VariableWithAddress>();
CompileUnit cu = DwarfLib.getCompileUnit(dwarfArrayList, address);
for (DwarfLine line : cu.dwarfDebugLineHeader.lines) {
if (line.address.compareTo(BigInteger.valueOf(address)) < 0) {
continue;
}
// System.out.println(line.file_num + " = " + cu.dwarfDebugLineHeader.filenames.get((int) line.file_num).file.getAbsolutePath() + "\t" + line);
VariableWithAddress variableWithAddress = new VariableWithAddress();
variableWithAddress.file_num = line.file_num;
variableWithAddress.line_num = line.line_num;
variableWithAddress.address = line.address;
variableWithAddresses.add(variableWithAddress);
}
for (DebugInfoEntry debugInfoEntry : cu.debugInfoEntries) {
for (DebugInfoEntry debugInfoEntry2 : debugInfoEntry.debugInfoEntries) {
if (debugInfoEntry2.name.equals("DW_TAG_variable")) {
} else if (debugInfoEntry2.name.equals("DW_TAG_subprogram")) {
for (DebugInfoEntry debugInfoEntry3 : debugInfoEntry2.debugInfoEntries) {
if (debugInfoEntry3.name.equals("DW_TAG_variable")) {
try {
// System.out.println("\t\t\t\t" + debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_name"));
// System.out.println("\t\t\t\t" + debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_file"));
// System.out.println("\t\t\t\tclass=" + debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_line"));
// System.out.println("\t\t\t\tclass=" + debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_line").value.getClass());
int lineNo;
if (debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_line").form == Definition.DW_FORM_data1) {
lineNo = Integer.parseInt(debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_line").value.toString());
} else {
lineNo = Integer.parseInt(debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_line").value.toString(), 16);
}
int colNo = Integer.parseInt(debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_column").value.toString());
int fileNo = (int) debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_decl_file").value;
List<VariableWithAddress> result = variableWithAddresses.stream().filter(a -> a.file_num == fileNo).collect(Collectors.toList());
boolean check = false;
if (result.get(0).line_num <= lineNo && lineNo <= result.get(result.size() - 1).line_num) {
check = true;
}
if (!check) {
return;
}
String filePath = cu.dwarfDebugLineHeader.filenames.get((int) fileNo).file.getAbsolutePath();
List<String> lines = FileUtils.readLines(new File(filePath), Charset.defaultCharset());
System.out.printf("%x %s:%d \t= %s, %s\n", address, filePath, lineNo, debugInfoEntry3.debugInfoAbbrevEntries.get("DW_AT_name").value, lines.get(fileNo));
} catch (IOException ex) {
Logger.getLogger(QemuLogToMap.class.getName()).log(Level.SEVERE, null, ex);
}
}
}
}
}
}
Teaching students for competition in THEi
2024-03-31 15:47:43
Install apache and php for http research
I need a super clean apache and forward all PHP requests to a independent php-cgi process which host by a specific port 1. Install Apache Mac In ubuntu, no need to build apache from source, just “sudo apt-get install apache2” Linux 2. Install PHP Mac Linux if you meet this error “configure: error: re2c 1.0.3 […] 2024-03-30 16:03:55
I need a super clean apache and forward all PHP requests to a independent php-cgi process which host by a specific port
1. Install Apache
Mac
In ubuntu, no need to build apache from source, just "sudo apt-get install apache2"
git clone https://github.com/apache/apr.git cd apr ./buildconf ./configure --prefix=/Users/peter/Downloads/apr-install make -j make install
git clone https://github.com/apache/httpd.git cd httpd ./configure --prefix=/Users/peter/Downloads/apache-install --with-apr=/Users/peter/Downloads/apr-install make -j make install
Linux
git clone https://github.com/apache/httpd.git cd httpd ./buildconf ./configure --prefix=/home/peter/Downloads/apache-install make -j make install
2. Install PHP
Mac
git clone https://github.com/php/php-src.git ./buildconf ./configure --prefix=/Users/peter/Downloads/php-install --with-openssl --with-iconv=$(brew --prefix libiconv) --with-zlib --with-mysqli make -j make install
Linux
git clone https://github.com/php/php-src.git ./buildconf ./configure --with-openssl --with-mysqli --with-zlib --prefix=/home/peter/Downloads/php-install make -j make install
if you meet this error "configure: error: re2c 1.0.3 or newer is required to generate PHP lexers.", do "sudo apt-get install re2c"
3. Setup Apache
- sudo apt-get install apache2
- sudo a2enmod proxy_http
- edit "/etc/apache2/mods-available/proxy.load", add "LoadModule proxy_fcgi_module /usr/lib/apache2/modules/mod_proxy_fcgi.so"
- edit "/etc/apache2/sites-enabled/000-default.conf", add these
- edit "/home/peter/Downloads/apache-install/conf/httpd.conf"
<IfModule dir_module>
DirectoryIndex index.php index.html
</IfModule>
<Files ~ "\.(php|phtml)$">
SetHandler "proxy:fcgi://127.0.0.1:1992//./"
ProxyFCGIBackendType GENERIC
</Files>
- Enable these
LoadModule proxy_module modules/mod_proxy.so LoadModule proxy_fcgi_module modules/mod_proxy_fcgi.so
4. Run
/home/peter/Downloads/php-install/bin/php-cgi -b 1992
5. If you see this WordPress error, add this to debug
ob_flush(); ob_start(); var_dump($error); $message = __( '3. There has been a critical error on this website.<pre>'.ob_get_flush().'</pre>');
6. Memory exhausted
add "memory_limit = 1020M" to php.ini
7. If you see this Phpmyadmin error, do this
Edit /Users/peter/Downloads/php-install/lib/php.ini, add "output_buffering = 100M"
If you see this error, do these
Edit /Users/peter/Downloads/php-install/lib/php.ini, add "mysqli.default_socket = /var/run/mysqld/mysqld.sock"
If you see "Getting error mysqli::real_connect(): (HY000/2002): No such file or directory", do these
Change localhost to 127.0.0.1 in config.inc.php
$cfg['Servers'][$i]['host'] = '127.0.0.1';
Use tcpdump to capture fast-cgi packages
sudo tcpdump -i any -nn -Xx port 1992 <-- dump hex sudo tcpdump -i any -nn -A port 1992 <-- dump ascii
Using wireshark to capture fastcgi
tcp.port eq 1992 and tcp.len>100
Dinner with HKI MEICOM
2024-03-17 23:03:45
有關於ESG之IT項目
IT projects play a crucial role in advancing Environmental, Social, and Governance (ESG) goals. Let’s explore how digital initiatives can contribute to ESG efforts: In summary, IT projects can drive positive change by integrating ESG principles, optimizing energy usage, and contributing to global sustainability. 2024-03-06 18:49:07
IT projects play a crucial role in advancing Environmental, Social, and Governance (ESG) goals. Let’s explore how digital initiatives can contribute to ESG efforts: In summary, IT projects can drive positive change by integrating ESG principles, optimizing energy usage, and contributing to global sustainability. 2024-03-06 18:49:07
IT projects play a crucial role in advancing Environmental, Social, and Governance (ESG) goals. Let’s explore how digital initiatives can contribute to ESG efforts:
- Digital Transformation and ESG Integration:
- Digital transformation aims to enhance business outcomes by leveraging technology across the value chain. Simultaneously, ESG focuses on creating broader value for stakeholders from environmental, social, and governance perspectives.
- These two goals can go hand-in-hand. Organizations can embed ESG considerations into their digital transformation initiatives.
- For instance, innovations like edge computing (part of “New IT”) can make ESG efforts more effective and efficient1.
- Energy Efficiency and High-Performance Computing:
- High-performance computing (HPC) is essential for scientific research, including climate change analysis and vaccine research.
- Historically, HPC has consumed significant energy and had environmental impact.
- Companies like Lenovo have combined liquid cooling technology with HPC clusters to improve energy efficiency while addressing critical research needs1.
- UN Sustainable Development Goals (SDGs):
- IT architecture plays a vital role in translating ESG strategies into daily business operations.
- By aligning IT projects with specific SDGs, organizations can drive positive impact.
- For example, using data analytics to address climate change or enhance healthcare delivery contributes to SDGs2.
- Infrastructure Projects and ESG Mitigation:
- Infrastructure projects significantly impact society, the environment, and the economy.
- Mitigating ESG risks is essential for such projects.
- By integrating ESG considerations into IT planning and execution, organizations can create sustainable infrastructure3.
- Digital Sustainability:
- Applying digital solutions to sustainability challenges is key to achieving ESG goals.
- Organizations must strategically decide where and how to use digital tools to enhance sustainability efforts4.
In summary, IT projects can drive positive change by integrating ESG principles, optimizing energy usage, and contributing to global sustainability.
ubuntu , allow root to login mysql without sudo
2024-03-03 15:58:35
2024-03-03 15:58:35
mysql > ALTER USER 'root'@'localhost' IDENTIFIED WITH mysql_native_password BY ''; mysql > FLUSH PRIVILEGES;
公關力
2024-03-02 17:22:36
fix TS1005 in spfx project
“extends”: “./node_modules/@microsoft/rush-stack-compiler-3.9/includes/tsconfig-web.json”, 2024-02-25 18:00:56
“extends”: “./node_modules/@microsoft/rush-stack-compiler-3.9/includes/tsconfig-web.json”, 2024-02-25 18:00:56
- remove all rust-stack-compiler by "npm uninstall -D @microsoft/rush-stack-compiler-3.2"
- install a newer one by "npm i -D @microsoft/rush-stack-compiler-3.9"
- edit tsconfig.json, change the "extend"
"extends": "./node_modules/@microsoft/rush-stack-compiler-3.9/includes/tsconfig-web.json",
Linear Regression in java
2024-02-14 21:49:03
2024-02-14 21:49:03
package hk.quantr.linearregression;
public class LinearRegression {
private final double intercept, slope;
private final double r2;
private final double svar0, svar1;
/**
* Performs a linear regression on the data points {@code (y[i], x[i])}.
*
* @param x the values of the predictor variable
* @param y the corresponding values of the response variable
*/
public LinearRegression(double[] x, double[] y) {
if (x.length != y.length) {
throw new IllegalArgumentException("array lengths are not equal");
}
int n = x.length;
// first pass
double sumx = 0.0, sumy = 0.0, sumx2 = 0.0;
for (int i = 0; i < n; i++) {
sumx += x[i];
sumx2 += x[i] * x[i];
sumy += y[i];
}
double xbar = sumx / n;
double ybar = sumy / n;
// second pass: compute summary statistics
double xxbar = 0.0, yybar = 0.0, xybar = 0.0;
for (int i = 0; i < n; i++) {
xxbar += (x[i] - xbar) * (x[i] - xbar);
yybar += (y[i] - ybar) * (y[i] - ybar);
xybar += (x[i] - xbar) * (y[i] - ybar);
}
slope = xybar / xxbar;
intercept = ybar - slope * xbar;
// more statistical analysis
double rss = 0.0; // residual sum of squares
double ssr = 0.0; // regression sum of squares
for (int i = 0; i < n; i++) {
double fit = slope * x[i] + intercept;
rss += (fit - y[i]) * (fit - y[i]);
ssr += (fit - ybar) * (fit - ybar);
}
int degreesOfFreedom = n - 2;
r2 = ssr / yybar;
double svar = rss / degreesOfFreedom;
svar1 = svar / xxbar;
svar0 = svar / n + xbar * xbar * svar1;
}
/**
* Returns the <em>y</em>-intercept α of the best of the best-fit line <em>y</em> = α + β <em>x</em>.
*/
public double intercept() {
return intercept;
}
/**
* Returns the slope β of the best of the best-fit line <em>y</em> = α + β <em>x</em>.
*/
public double slope() {
return slope;
}
/**
* Returns the coefficient of determination <em>R</em><sup>2</sup>.
*/
public double R2() {
return r2;
}
/**
* Returns the standard error of the estimate for the intercept.
*/
public double interceptStdErr() {
return Math.sqrt(svar0);
}
/**
* Returns the standard error of the estimate for the slope.
*/
public double slopeStdErr() {
return Math.sqrt(svar1);
}
/**
* Returns the expected response {@code y} given the value of the predictor variable {@code x}.
*/
public double predict(double x) {
return slope * x + intercept;
}
/**
* Returns a string representation of the simple linear regression model.
*/
public String toString() {
StringBuilder s = new StringBuilder();
s.append(String.format("%.2f n + %.2f", slope(), intercept()));
s.append(" (R^2 = " + String.format("%.3f", R2()) + ")");
return s.toString();
}
public static void main(String[] args) {
double x[] = {1, 2, 3};
double y[] = {4, 5, 7};
LinearRegression lr = new LinearRegression(x, y);
System.out.println(lr.predict(4));
}
}
Road map to learn AI
2024-02-12 00:48:19
The way to extend qemu TCG plugin functionality
Hi, if want to to provide other function-calls to TCG plugin, such as reading guest memory, follow these steps: https://peter.quantr.hk/2024/01/qemu-risc-v-log-all-memory-operations/ 5. Run in qemu 6. Edit xv6-riscv Makefile: References: 2024-02-10 23:48:15
Hi, if want to to provide other function-calls to TCG plugin, such as reading guest memory, follow these steps:
- in include/qemu/qemu-plugin.h, add function header, such as
/** * qemu_plugin_read_guest_virt_mem() - Read a buffer of guest memory * @gva: Guest virtual address * @buf: Buffer to copy guest memory into * @length: Size of buf * * Returns: True if the memory was successfully copied into buf */ bool qemu_plugin_read_guest_virt_mem(uint64_t gva, char* buf, size_t length);
- in plugins/api.c, add function body, such as
bool qemu_plugin_read_guest_virt_mem(uint64_t gva, char* buf, size_t length) {
#ifdef CONFIG_USER_ONLY
return false;
#else
// Convert virtual address to physical, then read it
CPUState *cpu = current_cpu;
uint64_t page = gva & TARGET_PAGE_MASK;
hwaddr gpa = cpu_get_phys_page_debug(cpu, page);
if (gpa == (hwaddr)-1) {
return false;
}
gpa += (gva & ~TARGET_PAGE_MASK);
// cpu_physical_memory_read(gpa, buf, length);
cpu_memory_rw_debug(cpu, gva, buf, length, false);
return true;
#endif
}
- in plugins/qemu-plugins.symbols, add
qemu_plugin_read_guest_virt_mem;
- in your tcg plugin tests/tcg/plugins/mem.c, just call to it, such as
https://peter.quantr.hk/2024/01/qemu-risc-v-log-all-memory-operations/
5. Run in qemu
./configure --target-list=riscv64-softmmu --enable-plugins
6. Edit xv6-riscv Makefile:
qemu2: $K/kernel fs.img
$(QEMU) $(QEMUOPTS) -singlestep -d exec,cpu,nochain,in_asm,int,plugin -plugin ~/workspace/qemu/build/tests/tcg/plugins/libmem.so,callback=true -D qemu.log
References:
- https://gitlab.com/qemu-project/qemu/-/issues/2152#note_1767322945
- https://github.com/qemu/qemu/commit/72c661a7f141ab41fbce5e95eb3593b69f40e246?diff=split&w=0#diff-d508cf0c073440a0ef62534395ec2ccff4378932f755f0d093cdc1795d9f871f
- https://airbus-seclab.github.io/qemu_blog/tcg_p3.html
- https://airbus-seclab.github.io/qemu_blog/regions.html
QEMU risc-v , log all memory operations
Step 1: Step 2: modify ./tests/tcg/plugins/mem.c , add this code in vcpu_mem() Step 3: in xv6-riscv change this to Then you see this References 2024-01-27 15:22:48
Step 1:
./configure --target-list=riscv64-softmmu --enable-plugins
Step 2: modify ./tests/tcg/plugins/mem.c , add this code in vcpu_mem()
struct qemu_plugin_hwaddr *hwaddr2 = qemu_plugin_get_hwaddr(meminfo, vaddr);
const char *name = qemu_plugin_hwaddr_device_name(hwaddr2);
uint64_t addr = qemu_plugin_hwaddr_phys_addr(hwaddr2);
g_autoptr(GString) out = g_string_new("");
uint64_t temp=0;
//unsigned int size=8;
unsigned int size=qemu_plugin_mem_size_shift(meminfo); // get the accessed memory size
if (size==0){
size=1;
}else if (size==1){
size=2;
}else if (size==2){
size=4;
}else{
size=8;
}
qemu_plugin_read_guest_virt_mem(vaddr, (char *)&temp, size);
if (qemu_plugin_mem_is_store(meminfo)) {
g_string_printf(out, "> mem store (%s), 0x%lx, 0x%lx, 0x%lx, %d\n", name, (long unsigned int)vaddr, (long unsigned int)addr, (long unsigned int)temp, size);
} else {
g_string_printf(out, "> mem load(%s), 0x%lx, 0x%lx, 0x%lx, %d\n", name, (long unsigned int)vaddr, (long unsigned int)addr, (long unsigned int)temp, size);
}
qemu_plugin_outs(out->str);
Step 3: in xv6-riscv
change this
qemu-system-riscv64 -machine virt -bios none -kernel kernel/kernel -m 3M -smp 1 -nographic -global virtio-mmio.force-legacy=false -drive file=fs.img,if=none,format=raw,id=x0 -device virtio-blk-device,drive=x0,bus=virtio-mmio-bus.0 -singlestep -d exec,cpu,nochain,in_asm,int,trace:memory_region_ops_read,trace:memory_region_ops_write -D qemu.log
to
qemu-system-riscv64 -machine virt -bios none -kernel kernel/kernel -m 3M -smp 1 -nographic -global virtio-mmio.force-legacy=false -drive file=fs.img,if=none,format=raw,id=x0 -device virtio-blk-device,drive=x0,bus=virtio-mmio-bus.0 -accel tcg,one-insn-per-tb=on -d exec,cpu,nochain,in_asm,int,plugin -plugin ~/workspace/qemu/build/tests/tcg/plugins/libmem.so,callback=true -D qemu.log
Then you see this
References
Qemu's trace_memory_region_ops_write
I was trying to find the body of trace_memory_region_ops_write function in qemu source code, can’t find it. It is generated by python script (log.py) 2024-01-17 01:08:36
I was trying to find the body of trace_memory_region_ops_write function in qemu source code, can't find it. It is generated by python script (log.py)
X11 is good but slow in starbucks
I am sitting in Starbucks with network speed 15Mbps and try to use X11 forward for Netbeans coding. XMing is very low screen resolution so I changed to x410. The text is super clear now but the bandwidth not enought, so a little bit lagging. You can see xming font is not clear in my […] 2024-01-16 20:44:03
I am sitting in Starbucks with network speed 15Mbps and try to use X11 forward for Netbeans coding. XMing is very low screen resolution so I changed to x410. The text is super clear now but the bandwidth not enought, so a little bit lagging.
You can see xming font is not clear in my 4k monitor if compare to local vscode
Changed to X410 and font is clear now, but it need some network bandwidth, so lagging in Starbucks. To solve this, turn on DPI scale
Corsair MP600 needs to upgrade SSD firmware otherwise speed is very slow
2024-01-12 15:41:47
Latest SPFx, web parts not appear
Using latest SPFx with node v18, pack and deploy the app no error, but web parts not appear, because you missed this. When you upgrade your SharePoint project, beware of this 2024-01-12 11:48:19
Using latest SPFx with node v18, pack and deploy the app no error, but web parts not appear, because you missed this. When you upgrade your SharePoint project, beware of this
Netbeans programmatically add watch expression to the "watch window"
use this code pom.xml 2024-01-05 14:59:33
use this code pom.xml 2024-01-05 14:59:33
use this code
import org.netbeans.api.debugger.DebuggerManager;
DebuggerManager.getDebuggerManager().createWatch("your expression, e.g. variable name");
pom.xml
<dependencies> <dependency> <groupId>org.netbeans.api</groupId> <artifactId>org-netbeans-api-annotations-common</artifactId> <version>RELEASE170</version> </dependency> <dependency> <groupId>org.netbeans.api</groupId> <artifactId>org-openide-util</artifactId> <version>RELEASE170</version> </dependency> <dependency> <groupId>org.netbeans.api</groupId> <artifactId>org-openide-awt</artifactId> <version>RELEASE170</version> </dependency> <dependency> <groupId>org.netbeans.api</groupId> <artifactId>org-netbeans-api-debugger</artifactId> <version>RELEASE170</version> </dependency> <dependency> <groupId>org.netbeans.api</groupId> <artifactId>org-netbeans-spi-debugger-ui</artifactId> <version>RELEASE170</version> </dependency> </dependencies>
RISC-V qemu doesn't log "PRIV" in every instruction
RISC-V qemu seems wrong because it doesn’t log “PRIV:” in every instruction in qemu.log. Even mret is execute and the mode is changed, it doesn’t log “PRIV”. To fix this: 2023-12-27 15:17:33
RISC-V qemu seems wrong because it doesn't log "PRIV:" in every instruction in qemu.log. Even mret is execute and the mode is changed, it doesn't log "PRIV".
To fix this:
- In accel/tcg/cpu-exec.c, in function log_cpu_exec, add parameter "CPURISCVState *env"
qemu_log_mask(CPU_LOG_EXEC,"Priv: "TARGET_FMT_ld"; Virt: %d\n", env->priv, env->virt_enabled);
- Change every calling function "log_cpu_exec", add env as last parameter
- "make" and "sudo make install"
Create a breadboard FPGA
We tried to ask GOWIN to let us generate the bitstream but seems they are not willing to open their standard, xilinx and altera has no hope too. So for education purpose we now go for build a simple one. We found the way to break logic into LUTs, so we want to build a […] 2023-12-24 19:30:07
We tried to ask GOWIN to let us generate the bitstream but seems they are not willing to open their standard, xilinx and altera has no hope too. So for education purpose we now go for build a simple one.
We found the way to break logic into LUTs, so we want to build a very simple FPGA in the breadboard by using AT28C16 as the LUTs and another At28 to be the switch-block. We let people build the circuit using Quantr-Logic, then use Arduino to program all AT28. Because Arduino nano doesn't have enough pin so we use a shift registers and some de-mux (74LS139) to connect it to all AT28.
We will create a very simple bitstream standard and let Quantr-logic export the project to it, and make the ardunio able to understand and do the flash-programming job.
CLB is the simplest one, an AT28 for Luts + D-flip-flop. The Demux is used to select whether the output is passing through the D-flip flop or not, that mean switching from combination logic to sequential logic.
NOR vs NAND flash
i finally found the differences between NOR and NAND flash, but just dont know what is it 2023-12-22 18:05:19
i finally found the differences between NOR and NAND flash, but just dont know what is it
WordPress Theme to support post-views-counter
To make the plugin works, need to call wp_footer() in footer.php 2023-12-04 20:26:28
To make the plugin works, need to call wp_footer() in footer.php
ENC28J60 + Arduino
2023-11-09 19:05:39
2023-11-09 19:05:39
// Watch video here: https://www.youtube.com/watch?v=M4mVDnlnzSA
// UIP is a proper library for Arduino Nano Ethernet shield
// NOTE: UIPEthernet library is not needed if you are using Arduino UNO/Duemilanove/Mega/etc.
// UIPEthernet library is used for Arduino Nano Ethernet Shield
#include <UIPEthernet.h> // Used for Ethernet
// **** ETHERNET SETTING ****
byte mac[] = { 0x90, 0xA2, 0xDA, 0x0D, 0x78, 0xEE };
// Change the IP below to your subnet if you have any issues
// IPAddress ip(192, 168, 0, 115);
IPAddress ip(192, 168, 1, 115);
EthernetServer server(80);
void setup() {
Serial.begin(9600);
// start the Ethernet connection and the server:
Ethernet.begin(mac, ip);
server.begin();
Serial.print("IP Address: ");
Serial.println(Ethernet.localIP());
}
void loop() {
// listen for incoming clients
EthernetClient client = server.available();
if (client)
{
Serial.println("-> New Connection");
// an http request ends with a blank line
boolean currentLineIsBlank = true;
while (client.connected())
{
if (client.available())
{
char c = client.read();
// if you've gotten to the end of the line (received a newline
// character) and the line is blank, the http request has ended,
// so you can send a reply
if (c == '\n' && currentLineIsBlank)
{
client.println("<html><title>Hello World!</title><body><h3>Hello World!</h3></body>");
break;
}
if (c == '\n') {
// you're starting a new line
currentLineIsBlank = true;
}
else if (c != '\r')
{
// you've gotten a character on the current line
currentLineIsBlank = false;
}
}
}
// give the web browser time to receive the data
delay(10);
// close the connection:
client.stop();
Serial.println(" Disconnected\n");
}
}
CS人如何同EE人溝通
首先，你要承認幾點先 千萬唔可以俾佢地知你知呢幾樣野，否則死得好慘 要不停贊美呢幾樣野 2023-11-09 00:16:18
首先，你要承認幾點先 千萬唔可以俾佢地知你知呢幾樣野，否則死得好慘 要不停贊美呢幾樣野 2023-11-09 00:16:18
首先，你要承認幾點先
- EE係最西利最殊勝嘅科目，由其是係編程方面，總之就係好勁 （注：雖然我唔知係乜）
- 讀EE嘅人好勁，勁在對電子好有認識，所以寫program好勁 (注：係人都知EE學生唔會有心讀電子㗎啦）
- 讀EE對電腦會有一種只有佢地先有嘅見解，好利害呀 （注：一班根本無心讀EE嘅學生我都想知可以有乜獨到見解）
千萬唔可以俾佢地知你知呢幾樣野，否則死得好慘
- EE得兩三科係教programming，嗰兩三科仲要有一兩科係教low-level野，姐係話high level programming玩下手得一科
- CS人寫pragramming整體黎講更勁 （呢一點好梗要，比佢地知你知呢一點你死梗）
- CS呢一科學programming比EE更完整 （比佢地知道呢一點，你等同話比佢地知coding世界唔應該比EE領導，你會好大鑊）
要不停贊美呢幾樣野
- 讀EE數底要好好
- EE進可攻退可守，好無敵
- EE出到黎，有埋電子知識，無敵啦
Arduino Function Generator
I am using Nano and AD9833 to build a simple function generator. Code in here https://gitlab.com/quantr/hardware/arduino-function-generator 2023-11-07 01:33:44
I am using Nano and AD9833 to build a simple function generator. Code in here https://gitlab.com/quantr/hardware/arduino-function-generator
Arduino + AD9833 using library by Rob Tillaart
Buy the board here : https://item.taobao.com/item.htm?spm=a1z09.2.0.0.6caf2e8dU9c4dS&id=590166217396&_u=6buhab0a8d9 Install the library, see below Make sure connect these pins to the board, total 5 pins, follow below Refer to https://github.com/RobTillaart/AD9833 , more examples in https://github.com/RobTillaart/AD9833/tree/master/examples 2023-11-06 21:49:07
Buy the board here : https://item.taobao.com/item.htm?spm=a1z09.2.0.0.6caf2e8dU9c4dS&id=590166217396&_u=6buhab0a8d9
Install the library, see below
Make sure connect these pins to the board, total 5 pins, follow below
#include "AD9833.h"
AD9833 AD;
void setup()
{
Serial.begin(115200);
Serial.println(__FILE__);
AD.begin(10); // HW SPI, select pin 10
AD.setWave(AD9833_SQUARE1);
// AD.setWave(AD9833_SINE);
// AD.setWave(AD9833_SQUARE1);
// AD.setWave(AD9833_SQUARE2);
// AD.setWave(AD9833_TRIANGLE);
AD.setFrequency(10.0, 0);
Serial.println(AD.getWave());
}
void loop()
{
}
Refer to https://github.com/RobTillaart/AD9833 , more examples in https://github.com/RobTillaart/AD9833/tree/master/examples
Arduino + AD9833
Buy from here. I am using the example from here but ignore the switch buttons. You need to add this zip into the library and make sure don’t install the other library call “AD9833”, very important 2023-11-06 21:33:44
Buy from here. I am using the example from here but ignore the switch buttons.
You need to add this zip into the library and make sure don't install the other library call "AD9833", very important
#include <AD9833.h>
#include <digitalWriteFast.h>
AD9833 gen(9);
long f;
void setup()
{
gen.Begin();
gen.EnableOutput(true);
}
void loop()
{
f = map(0,0,1023,1000,5000);
// gen.ApplySignal(SINE_WAVE, REG0, f);
// gen.ApplySignal(TRIANGLE_WAVE,REG0,f);
gen.ApplySignal(SQUARE_WAVE,REG0,f);
// gen.ApplySignal(HALF_SQUARE_WAVE,REG0,f);
}
Program與輪廻之對比
我想探討一下用電腦program與佛教輪廻之對比，唯先你必需要明白佛教講的核心理論就是無我，無常 Program之空性體驗 當你寫一段program去令電腦運行時，你所寫的每一行代碼你都會解釋到它的用途，所以你會有一種非常實在的感覺，但當你越鑽越深的時候，你會發現一個有趣現象就是你認為一個好實在的個體，例如 int x，去到深處你會發現它消失不見，又或者它可以同時出現在不同的空間之中。這正正體驗到佛教所講的無我，無我的意思是一件物件必定是由多個因緣所組成，它要在特定時刻和經由特定情況先至可以顯露在你面前，program都是一樣，你看不到只是你編程功力不夠 2023-11-05 03:10:36
我想探討一下用電腦program與佛教輪廻之對比，唯先你必需要明白佛教講的核心理論就是無我，無常 Program之空性體驗 當你寫一段program去令電腦運行時，你所寫的每一行代碼你都會解釋到它的用途，所以你會有一種非常實在的感覺，但當你越鑽越深的時候，你會發現一個有趣現象就是你認為一個好實在的個體，例如 int x，去到深處你會發現它消失不見，又或者它可以同時出現在不同的空間之中。這正正體驗到佛教所講的無我，無我的意思是一件物件必定是由多個因緣所組成，它要在特定時刻和經由特定情況先至可以顯露在你面前，program都是一樣，你看不到只是你編程功力不夠 2023-11-05 03:10:36
我想探討一下用電腦program與佛教輪廻之對比，唯先你必需要明白佛教講的核心理論就是無我，無常
Program之空性體驗
當你寫一段program去令電腦運行時，你所寫的每一行代碼你都會解釋到它的用途，所以你會有一種非常實在的感覺，但當你越鑽越深的時候，你會發現一個有趣現象就是你認為一個好實在的個體，例如 int x，去到深處你會發現它消失不見，又或者它可以同時出現在不同的空間之中。這正正體驗到佛教所講的無我，無我的意思是一件物件必定是由多個因緣所組成，它要在特定時刻和經由特定情況先至可以顯露在你面前，program都是一樣，你看不到只是你編程功力不夠
TheDB發展戰略圖
2023-11-01 20:30:04
2023-11-01 20:30:04
Rotate button by Arduino
Refer to https://zhuanlan.zhihu.com/p/349824627 , buy from here 2023-10-30 17:41:31
Refer to https://zhuanlan.zhihu.com/p/349824627 , buy from here
#define CLK 2
#define DT 3
#define SW 4
int counter = 0;
int currentStateCLK;
int lastStateCLK;
String currentDir = "";
unsigned long lastButtonPress = 0;
void setup() {
// Set encoder pins as inputs
pinMode(CLK, INPUT);
pinMode(DT, INPUT);
pinMode(SW, INPUT_PULLUP);
// Setup Serial Monitor
Serial.begin(9600);
// Read the initial state of CLK
lastStateCLK = digitalRead(CLK);
}
void loop() {
// Read the current state of CLK
currentStateCLK = digitalRead(CLK);
// If last and current state of CLK are different, then pulse occurred
// React to only 1 state change to avoid double count
if (currentStateCLK != lastStateCLK && currentStateCLK == 1) {
// If the DT state is different than the CLK state then
// the encoder is rotating CCW so decrement
if (digitalRead(DT) != currentStateCLK) {
counter++;
currentDir = "CW";
} else {
// Encoder is rotating CW so increment
counter--;
currentDir = "CCW";
}
Serial.print("Direction: ");
Serial.print(currentDir);
Serial.print(" | Counter: ");
Serial.println(counter);
}
// Remember last CLK state
lastStateCLK = currentStateCLK;
// Read the button state
int btnState = digitalRead(SW);
//If we detect LOW signal, button is pressed
if (btnState == LOW) {
//if 50ms have passed since last LOW pulse, it means that the
//button has been pressed, released and pressed again
if (millis() - lastButtonPress > 50) {
Serial.println("Button pressed!");
}
// Remember last button press event
lastButtonPress = millis();
}
// Put in a slight delay to help debounce the reading
delay(1);
}
MCP4725 I2C DAC Breakout board
Bought from here Testing maximum frequency, around 800us 2023-10-30 13:36:50
Bought from here
#include <Wire.h>
#include <Adafruit_MCP4725.h>
Adafruit_MCP4725 dac;
#define DAV_RESOLUTION (9)
void setup() {
Serial.begin(9600);
Serial.println("MCP4725 Test");
// 0x62 default
// 0x63 Addr pin tied to VCC
// 0x60 Addr pin tied to GND
dac.begin(0x60);
}
void loop() {
for (int x=1;x<=5;x++){
dac.setVoltage(x*4096/5, false);
delay(50);
}
}
Testing maximum frequency, around 800us
#include <Wire.h>
#include <Adafruit_MCP4725.h>
Adafruit_MCP4725 dac;
#define DAV_RESOLUTION (9)
void setup() {
Serial.begin(9600);
Serial.println("MCP4725 Test");
// 0x62 default
// 0x63 Addr pin tied to VCC
// 0x60 Addr pin tied to GND
dac.begin(0x60);
}
void loop() {
dac.setVoltage(1, false);
dac.setVoltage(4095, false);
}
GY-4725 board
Bought from here. This code test maximum frequency, around 1ms period is peak Documents 2023-10-30 13:24:40
Bought from here.
/*
MCP4725 Example Waveform Sketch
Joel Bartlett
SparkFun Electronics
Sept. 11, 2014
This sketch takes data from a lookup table to provide
waveforms to be generated by the MCP4725 DAC.
Development environment specifics:
Arduino 1.0+
Hardware Version V14
This code is beerware; if you see me (or any other SparkFun employee) at the local,
and you've found our code helpful, please buy us a round!
Distributed as-is; no warranty is given.
This code builds off the sketch written by Mark VandeWettering, which can be found here:
http://brainwagon.org/2011/02/24/arduino-mcp4725-breakout-board/
https://github.com/sparkfun/MCP4725_Breakout
*/
#include <Wire.h>//Include the Wire library to talk I2C
//This is the I2C Address of the MCP4725, by default (A0 pulled to GND).
//Please note that this breakout is for the MCP4725A0.
#define MCP4725_ADDR 0x61
//For devices with A0 pulled HIGH, use 0x61
//Sinewave Tables were generated using this calculator:
//http://www.daycounter.com/Calculators/Sine-Generator-Calculator.phtml
int lookup = 0;//varaible for navigating through the tables
int sintab2[512] =
{
2048, 2073, 2098, 2123, 2148, 2174, 2199, 2224,
2249, 2274, 2299, 2324, 2349, 2373, 2398, 2423,
2448, 2472, 2497, 2521, 2546, 2570, 2594, 2618,
2643, 2667, 2690, 2714, 2738, 2762, 2785, 2808,
2832, 2855, 2878, 2901, 2924, 2946, 2969, 2991,
3013, 3036, 3057, 3079, 3101, 3122, 3144, 3165,
3186, 3207, 3227, 3248, 3268, 3288, 3308, 3328,
3347, 3367, 3386, 3405, 3423, 3442, 3460, 3478,
3496, 3514, 3531, 3548, 3565, 3582, 3599, 3615,
3631, 3647, 3663, 3678, 3693, 3708, 3722, 3737,
3751, 3765, 3778, 3792, 3805, 3817, 3830, 3842,
3854, 3866, 3877, 3888, 3899, 3910, 3920, 3930,
3940, 3950, 3959, 3968, 3976, 3985, 3993, 4000,
4008, 4015, 4022, 4028, 4035, 4041, 4046, 4052,
4057, 4061, 4066, 4070, 4074, 4077, 4081, 4084,
4086, 4088, 4090, 4092, 4094, 4095, 4095, 4095,
4095, 4095, 4095, 4095, 4094, 4092, 4090, 4088,
4086, 4084, 4081, 4077, 4074, 4070, 4066, 4061,
4057, 4052, 4046, 4041, 4035, 4028, 4022, 4015,
4008, 4000, 3993, 3985, 3976, 3968, 3959, 3950,
3940, 3930, 3920, 3910, 3899, 3888, 3877, 3866,
3854, 3842, 3830, 3817, 3805, 3792, 3778, 3765,
3751, 3737, 3722, 3708, 3693, 3678, 3663, 3647,
3631, 3615, 3599, 3582, 3565, 3548, 3531, 3514,
3496, 3478, 3460, 3442, 3423, 3405, 3386, 3367,
3347, 3328, 3308, 3288, 3268, 3248, 3227, 3207,
3186, 3165, 3144, 3122, 3101, 3079, 3057, 3036,
3013, 2991, 2969, 2946, 2924, 2901, 2878, 2855,
2832, 2808, 2785, 2762, 2738, 2714, 2690, 2667,
2643, 2618, 2594, 2570, 2546, 2521, 2497, 2472,
2448, 2423, 2398, 2373, 2349, 2324, 2299, 2274,
2249, 2224, 2199, 2174, 2148, 2123, 2098, 2073,
2048, 2023, 1998, 1973, 1948, 1922, 1897, 1872,
1847, 1822, 1797, 1772, 1747, 1723, 1698, 1673,
1648, 1624, 1599, 1575, 1550, 1526, 1502, 1478,
1453, 1429, 1406, 1382, 1358, 1334, 1311, 1288,
1264, 1241, 1218, 1195, 1172, 1150, 1127, 1105,
1083, 1060, 1039, 1017, 995, 974, 952, 931,
910, 889, 869, 848, 828, 808, 788, 768,
749, 729, 710, 691, 673, 654, 636, 618,
600, 582, 565, 548, 531, 514, 497, 481,
465, 449, 433, 418, 403, 388, 374, 359,
345, 331, 318, 304, 291, 279, 266, 254,
242, 230, 219, 208, 197, 186, 176, 166,
156, 146, 137, 128, 120, 111, 103, 96,
88, 81, 74, 68, 61, 55, 50, 44,
39, 35, 30, 26, 22, 19, 15, 12,
10, 8, 6, 4, 2, 1, 1, 0,
0, 0, 1, 1, 2, 4, 6, 8,
10, 12, 15, 19, 22, 26, 30, 35,
39, 44, 50, 55, 61, 68, 74, 81,
88, 96, 103, 111, 120, 128, 137, 146,
156, 166, 176, 186, 197, 208, 219, 230,
242, 254, 266, 279, 291, 304, 318, 331,
345, 359, 374, 388, 403, 418, 433, 449,
465, 481, 497, 514, 531, 548, 565, 582,
600, 618, 636, 654, 673, 691, 710, 729,
749, 768, 788, 808, 828, 848, 869, 889,
910, 931, 952, 974, 995, 1017, 1039, 1060,
1083, 1105, 1127, 1150, 1172, 1195, 1218, 1241,
1264, 1288, 1311, 1334, 1358, 1382, 1406, 1429,
1453, 1478, 1502, 1526, 1550, 1575, 1599, 1624,
1648, 1673, 1698, 1723, 1747, 1772, 1797, 1822,
1847, 1872, 1897, 1922, 1948, 1973, 1998, 2023
};
void setup()
{
Wire.begin();
// Set A2 and A3 as Outputs to make them our GND and Vcc,
//which will power the MCP4725
pinMode(A2, OUTPUT);
pinMode(A3, OUTPUT);
digitalWrite(A2, LOW);//Set A2 as GND
digitalWrite(A3, HIGH);//Set A3 as Vcc
}
//---------------------------------------------------
void loop()
{
Wire.beginTransmission(MCP4725_ADDR);
Wire.write(64); // cmd to update the DAC
Wire.write(sintab2[lookup] >> 4); // the 8 most significant bits...
Wire.write((sintab2[lookup] & 15) << 4); // the 4 least significant bits...
Wire.endTransmission();
lookup = (lookup + 1) & 511;
}
This code test maximum frequency, around 1ms period is peak
/******************************************************************************
MCP4725 Example Waveform Sketch
Joel Bartlett
SparkFun Electronics
Sept. 11, 2014
This sketch takes data from a lookup table to provide
waveforms to be generated by the MCP4725 DAC.
Development environment specifics:
Arduino 1.0+
Hardware Version V14
This code is beerware; if you see me (or any other SparkFun employee) at the local,
and you've found our code helpful, please buy us a round!
Distributed as-is; no warranty is given.
This code builds off the sketch written by Mark VandeWettering, which can be found here:
http://brainwagon.org/2011/02/24/arduino-mcp4725-breakout-board/
https://github.com/sparkfun/MCP4725_Breakout
*/
#include <Wire.h>//Include the Wire library to talk I2C
//This is the I2C Address of the MCP4725, by default (A0 pulled to GND).
//Please note that this breakout is for the MCP4725A0.
#define MCP4725_ADDR 0x61
//For devices with A0 pulled HIGH, use 0x61
//Sinewave Tables were generated using this calculator:
//http://www.daycounter.com/Calculators/Sine-Generator-Calculator.phtml
void setup()
{
Wire.begin();
}
int x;
void loop()
{
Wire.beginTransmission(MCP4725_ADDR);
Wire.write(64); // cmd to update the DAC
Wire.write((x%2==0?0:4095) >> 4); // the 8 most significant bits...
Wire.write(((x%2==0?0:4095) & 15) << 4); // the 4 least significant bits...
Wire.endTransmission();
x++;
}
Documents
syscall.c for STM32 + XCubeAI
2023-10-25 14:25:52
2023-10-25 14:25:52
#include <_ansi.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/fcntl.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
#include <errno.h>
#include <reent.h>
#include <signal.h>
#include <unistd.h>
#include <sys/wait.h>
/* Forward prototypes. */
int _system(const char*);
int _rename(const char*, const char*);
int _isatty(int);
clock_t _times(struct tms*);
int _gettimeofday(struct timeval*, void*);
void _raise(void);
int _unlink(const char*);
int _link(const char*, const char*);
int _stat(const char*, struct stat*);
int _fstat(int, struct stat*);
void* _sbrk(ptrdiff_t);
pid_t _getpid(void);
int _kill(int, int);
void _exit(int);
int _close(int);
int _swiclose(int);
int _open(const char*, int, ...);
int _swiopen(const char*, int);
int _write(int, const void*, size_t);
int _swiwrite(int, const void*, size_t);
_off_t _lseek(int, _off_t, int);
_off_t _swilseek(int, _off_t, int);
int _read(int, void*, size_t);
int _swiread(int, void*, size_t);
void initialise_monitor_handles(void);
static int wrap(int);
static int error(int);
static int get_errno(void);
static int remap_handle(int);
static int findslot(int);
static int _kill_shared(int, int, int) __attribute__((__noreturn__));
int _close(int) {
return 0;
}
_off_t _lseek(int, _off_t, int) {
return 0;
}
int _read(int, void*, size_t) {
return 0;
}
int _write(int, const void*, size_t) {
return 0;
}
Redis uses its own protocol to communicate between redis-server and redis-client
I thought db client sending plain text command (in SQL) to server and server parse the command. But I found Redis and Mysql client communicate to server via a custom protocol, that prove the client parse the command, not the server socat -v tcp-listen:8001,reuseaddr,fork tcp:localhost:6379 2023-10-15 15:10:54
I thought db client sending plain text command (in SQL) to server and server parse the command. But I found Redis and Mysql client communicate to server via a custom protocol, that prove the client parse the command, not the server
socat -v tcp-listen:8001,reuseaddr,fork tcp:localhost:6379
FPGA Research
This is a synthesis of a simple verilog program in vivado 2023-10-14 17:33:14
This is a synthesis of a simple verilog program in vivado 2023-10-14 17:33:14
This is a synthesis of a simple verilog program in vivado
module led_twinkle(
input sys_clk,
input sys_rst_n,
output [1:0] led
);
ila_0 peter_ila(
.clk (sys_clk),
.probe0 (led),
.probe1 (cnt)
);
reg [25:0] cnt;
assign led=(cnt<26'd1500_0000)?2'b01:2'b10;
always @(posedge sys_clk or negedge sys_rst_n) begin
if (!sys_rst_n)
cnt<=26'd0;
else if (cnt<26'd3000_0000)
cnt<=cnt+1'b1;
else
cnt<=26'd0;
end
endmodule
Copyright 1986-2021 Xilinx, Inc. All Rights Reserved. ----------------------------------------------------------------------------------------------------------------- | Tool Version : Vivado v.2021.2.1 (win64) Build 3414424 Sun Dec 19 10:57:22 MST 2021 | Date : Sat Oct 14 17:29:58 2023 | Host : quantr-peter-pc running 64-bit major release (build 9200) | Command : report_utilization -file led_twinkle_utilization_synth.rpt -pb led_twinkle_utilization_synth.pb | Design : led_twinkle | Device : xc7a35tfgg484-2 | Speed File : -2 | Design State : Synthesized ----------------------------------------------------------------------------------------------------------------- Utilization Design Information Table of Contents ----------------- 1. Slice Logic 1.1 Summary of Registers by Type 2. Memory 3. DSP 4. IO and GT Specific 5. Clocking 6. Specific Feature 7. Primitives 8. Black Boxes 9. Instantiated Netlists 1. Slice Logic -------------- +-------------------------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +-------------------------+------+-------+------------+-----------+-------+ | Slice LUTs* | 40 | 0 | 0 | 20800 | 0.19 | | LUT as Logic | 40 | 0 | 0 | 20800 | 0.19 | | LUT as Memory | 0 | 0 | 0 | 9600 | 0.00 | | Slice Registers | 26 | 0 | 0 | 41600 | 0.06 | | Register as Flip Flop | 26 | 0 | 0 | 41600 | 0.06 | | Register as Latch | 0 | 0 | 0 | 41600 | 0.00 | | F7 Muxes | 0 | 0 | 0 | 16300 | 0.00 | | F8 Muxes | 0 | 0 | 0 | 8150 | 0.00 | +-------------------------+------+-------+------------+-----------+-------+ * Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count. 1.1 Summary of Registers by Type -------------------------------- +-------+--------------+-------------+--------------+ | Total | Clock Enable | Synchronous | Asynchronous | +-------+--------------+-------------+--------------+ | 0 | _ | - | - | | 0 | _ | - | Set | | 0 | _ | - | Reset | | 0 | _ | Set | - | | 0 | _ | Reset | - | | 0 | Yes | - | - | | 0 | Yes | - | Set | | 26 | Yes | - | Reset | | 0 | Yes | Set | - | | 0 | Yes | Reset | - | +-------+--------------+-------------+--------------+ 2. Memory --------- +----------------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +----------------+------+-------+------------+-----------+-------+ | Block RAM Tile | 0 | 0 | 0 | 50 | 0.00 | | RAMB36/FIFO* | 0 | 0 | 0 | 50 | 0.00 | | RAMB18 | 0 | 0 | 0 | 100 | 0.00 | +----------------+------+-------+------------+-----------+-------+ * Note: Each Block RAM Tile only has one FIFO logic available and therefore can accommodate only one FIFO36E1 or one FIFO18E1. However, if a FIFO18E1 occupies a Block RAM Tile, that tile can still accommodate a RAMB18E1 3. DSP ------ +-----------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +-----------+------+-------+------------+-----------+-------+ | DSPs | 0 | 0 | 0 | 90 | 0.00 | +-----------+------+-------+------------+-----------+-------+ 4. IO and GT Specific --------------------- +-----------------------------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +-----------------------------+------+-------+------------+-----------+-------+ | Bonded IOB | 4 | 0 | 0 | 250 | 1.60 | | Bonded IPADs | 0 | 0 | 0 | 14 | 0.00 | | Bonded OPADs | 0 | 0 | 0 | 8 | 0.00 | | PHY_CONTROL | 0 | 0 | 0 | 5 | 0.00 | | PHASER_REF | 0 | 0 | 0 | 5 | 0.00 | | OUT_FIFO | 0 | 0 | 0 | 20 | 0.00 | | IN_FIFO | 0 | 0 | 0 | 20 | 0.00 | | IDELAYCTRL | 0 | 0 | 0 | 5 | 0.00 | | IBUFDS | 0 | 0 | 0 | 240 | 0.00 | | GTPE2_CHANNEL | 0 | 0 | 0 | 4 | 0.00 | | PHASER_OUT/PHASER_OUT_PHY | 0 | 0 | 0 | 20 | 0.00 | | PHASER_IN/PHASER_IN_PHY | 0 | 0 | 0 | 20 | 0.00 | | IDELAYE2/IDELAYE2_FINEDELAY | 0 | 0 | 0 | 250 | 0.00 | | IBUFDS_GTE2 | 0 | 0 | 0 | 2 | 0.00 | | ILOGIC | 0 | 0 | 0 | 250 | 0.00 | | OLOGIC | 0 | 0 | 0 | 250 | 0.00 | +-----------------------------+------+-------+------------+-----------+-------+ 5. Clocking ----------- +------------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +------------+------+-------+------------+-----------+-------+ | BUFGCTRL | 1 | 0 | 0 | 32 | 3.13 | | BUFIO | 0 | 0 | 0 | 20 | 0.00 | | MMCME2_ADV | 0 | 0 | 0 | 5 | 0.00 | | PLLE2_ADV | 0 | 0 | 0 | 5 | 0.00 | | BUFMRCE | 0 | 0 | 0 | 10 | 0.00 | | BUFHCE | 0 | 0 | 0 | 72 | 0.00 | | BUFR | 0 | 0 | 0 | 20 | 0.00 | +------------+------+-------+------------+-----------+-------+ 6. Specific Feature ------------------- +-------------+------+-------+------------+-----------+-------+ | Site Type | Used | Fixed | Prohibited | Available | Util% | +-------------+------+-------+------------+-----------+-------+ | BSCANE2 | 0 | 0 | 0 | 4 | 0.00 | | CAPTUREE2 | 0 | 0 | 0 | 1 | 0.00 | | DNA_PORT | 0 | 0 | 0 | 1 | 0.00 | | EFUSE_USR | 0 | 0 | 0 | 1 | 0.00 | | FRAME_ECCE2 | 0 | 0 | 0 | 1 | 0.00 | | ICAPE2 | 0 | 0 | 0 | 2 | 0.00 | | PCIE_2_1 | 0 | 0 | 0 | 1 | 0.00 | | STARTUPE2 | 0 | 0 | 0 | 1 | 0.00 | | XADC | 0 | 0 | 0 | 1 | 0.00 | +-------------+------+-------+------------+-----------+-------+ 7. Primitives ------------- +----------+------+---------------------+ | Ref Name | Used | Functional Category | +----------+------+---------------------+ | LUT6 | 30 | LUT | | FDCE | 26 | Flop & Latch | | CARRY4 | 7 | CarryLogic | | LUT3 | 6 | LUT | | OBUF | 2 | IO | | LUT4 | 2 | LUT | | LUT1 | 2 | LUT | | IBUF | 2 | IO | | BUFG | 1 | Clock | +----------+------+---------------------+ 8. Black Boxes -------------- +----------+------+ | Ref Name | Used | +----------+------+ | ila_0 | 1 | +----------+------+ 9. Instantiated Netlists ------------------------ +----------+------+ | Ref Name | Used | +----------+------+
#----------------------------------------------------------- # Vivado v2021.2.1 (64-bit) # SW Build 3414424 on Sun Dec 19 10:57:22 MST 2021 # IP Build 3405791 on Sun Dec 19 15:54:35 MST 2021 # Start of session at: Sat Oct 14 17:29:24 2023 # Process ID: 11828 # Current directory: C:/workspace/led_twinkle/led_twinkle.runs/synth_1 # Command line: vivado.exe -log led_twinkle.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source led_twinkle.tcl # Log file: C:/workspace/led_twinkle/led_twinkle.runs/synth_1/led_twinkle.vds # Journal file: C:/workspace/led_twinkle/led_twinkle.runs/synth_1\vivado.jou # Running On: quantr-peter-pc, OS: Windows, CPU Frequency: 3793 MHz, CPU Physical cores: 24, Host memory: 137381 MB #----------------------------------------------------------- source led_twinkle.tcl -notrace INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Users/Peter/AppData/Roaming/Xilinx/Vitis/peter1'. INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'D:/Xilinx/Vivado/2021.2/data/ip'. Command: synth_design -top led_twinkle -part xc7a35tfgg484-2 Starting synth_design Attempting to get a license for feature 'Synthesis' and/or device 'xc7a35t' INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7a35t' INFO: [Device 21-403] Loading part xc7a35tfgg484-2 INFO: [Synth 8-7079] Multithreading enabled for synth_design using a maximum of 2 processes. INFO: [Synth 8-7078] Launching helper process for spawning children vivado processes INFO: [Synth 8-7075] Helper process launched with PID 22928 WARNING: [Synth 8-992] cnt is already implicitly declared earlier [C:/workspace/led_twinkle/led_twinkle.srcs/sources_1/new/led_twinkle.v:13] --------------------------------------------------------------------------------- Starting RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 1565.496 ; gain = 0.000 --------------------------------------------------------------------------------- INFO: [Synth 8-6157] synthesizing module 'led_twinkle' [C:/workspace/led_twinkle/led_twinkle.srcs/sources_1/new/led_twinkle.v:1] WARNING: [Synth 8-4446] all outputs are unconnected for this instance and logic may be removed [C:/workspace/led_twinkle/led_twinkle.srcs/sources_1/new/led_twinkle.v:7] INFO: [Synth 8-6157] synthesizing module 'ila_0' [C:/workspace/led_twinkle/led_twinkle.runs/synth_1/.Xil/Vivado-11828-quantr-peter-pc/realtime/ila_0_stub.v:6] INFO: [Synth 8-6155] done synthesizing module 'ila_0' (1#1) [C:/workspace/led_twinkle/led_twinkle.runs/synth_1/.Xil/Vivado-11828-quantr-peter-pc/realtime/ila_0_stub.v:6] INFO: [Synth 8-6071] Mark debug on the nets applies keep_hierarchy on instance 'peter_ila'. This will prevent further optimization [C:/workspace/led_twinkle/led_twinkle.srcs/sources_1/new/led_twinkle.v:7] INFO: [Synth 8-6155] done synthesizing module 'led_twinkle' (2#1) [C:/workspace/led_twinkle/led_twinkle.srcs/sources_1/new/led_twinkle.v:1] --------------------------------------------------------------------------------- Finished RTL Elaboration : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 1565.496 ; gain = 0.000 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 1565.496 ; gain = 0.000 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:05 ; elapsed = 00:00:06 . Memory (MB): peak = 1565.496 ; gain = 0.000 --------------------------------------------------------------------------------- Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1565.496 ; gain = 0.000 INFO: [Project 1-570] Preparing netlist for logic optimization Processing XDC Constraints Initializing timing engine Parsing XDC File [c:/workspace/led_twinkle/led_twinkle.gen/sources_1/ip/ila_0/ila_0/ila_0_in_context.xdc] for cell 'peter_ila' Finished Parsing XDC File [c:/workspace/led_twinkle/led_twinkle.gen/sources_1/ip/ila_0/ila_0/ila_0_in_context.xdc] for cell 'peter_ila' Parsing XDC File [C:/workspace/led_twinkle/led_twinkle.srcs/constrs_1/new/led_twinkle.xdc] Finished Parsing XDC File [C:/workspace/led_twinkle/led_twinkle.srcs/constrs_1/new/led_twinkle.xdc] INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [C:/workspace/led_twinkle/led_twinkle.srcs/constrs_1/new/led_twinkle.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/led_twinkle_propImpl.xdc]. Resolution: To avoid this warning, move constraints listed in [.Xil/led_twinkle_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis. Completed Processing XDC Constraints Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1590.539 ; gain = 0.000 INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.002 . Memory (MB): peak = 1590.539 ; gain = 0.000 --------------------------------------------------------------------------------- Finished Constraint Validation : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Loading Part and Timing Information --------------------------------------------------------------------------------- Loading part: xc7a35tfgg484-2 --------------------------------------------------------------------------------- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying 'set_property' XDC Constraints --------------------------------------------------------------------------------- Applied set_property MARK_DEBUG = true for cnt0[4]. (constraint file C:/workspace/led_twinkle/led_twinkle.srcs/constrs_1/new/led_twinkle.xdc, line 11). Applied set_property KEEP_HIERARCHY = SOFT for peter_ila. (constraint file auto generated constraint). --------------------------------------------------------------------------------- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start RTL Component Statistics --------------------------------------------------------------------------------- Detailed RTL Component Info : +---Adders : 2 Input 26 Bit Adders := 1 +---Registers : 26 Bit Registers := 1 +---Muxes : 2 Input 26 Bit Muxes := 1 2 Input 2 Bit Muxes := 1 --------------------------------------------------------------------------------- Finished RTL Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Part Resource Summary --------------------------------------------------------------------------------- Part Resources: DSPs: 90 (col length:60) BRAMs: 100 (col length: RAMB18 60 RAMB36 30) --------------------------------------------------------------------------------- Finished Part Resource Summary --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Cross Boundary and Area Optimization --------------------------------------------------------------------------------- WARNING: [Synth 8-7080] Parallel synthesis criteria is not met --------------------------------------------------------------------------------- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:13 ; elapsed = 00:00:14 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying XDC Timing Constraints --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:18 ; elapsed = 00:00:19 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Timing Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Timing Optimization : Time (s): cpu = 00:00:18 ; elapsed = 00:00:19 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Technology Mapping --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Technology Mapping : Time (s): cpu = 00:00:18 ; elapsed = 00:00:19 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished IO Insertion : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Instances --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Instances : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Rebuilding User Hierarchy --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Ports --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Ports : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Nets --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Nets : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Writing Synthesis Report --------------------------------------------------------------------------------- Report BlackBoxes: +------+--------------+----------+ | |BlackBox name |Instances | +------+--------------+----------+ |1 |ila_0 | 1| +------+--------------+----------+ Report Cell Usage: +------+-------+------+ | |Cell |Count | +------+-------+------+ |1 |ila | 1| |2 |BUFG | 1| |3 |CARRY4 | 7| |4 |LUT1 | 2| |5 |LUT3 | 6| |6 |LUT4 | 2| |7 |LUT6 | 30| |8 |FDCE | 26| |9 |IBUF | 2| |10 |OBUF | 2| +------+-------+------+ --------------------------------------------------------------------------------- Finished Writing Synthesis Report : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.539 ; gain = 25.043 --------------------------------------------------------------------------------- Synthesis finished with 0 errors, 0 critical warnings and 1 warnings. Synthesis Optimization Runtime : Time (s): cpu = 00:00:14 ; elapsed = 00:00:21 . Memory (MB): peak = 1590.539 ; gain = 0.000 Synthesis Optimization Complete : Time (s): cpu = 00:00:21 ; elapsed = 00:00:23 . Memory (MB): peak = 1590.539 ; gain = 25.043 INFO: [Project 1-571] Translating synthesized netlist Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.001 . Memory (MB): peak = 1593.570 ; gain = 0.000 INFO: [Netlist 29-17] Analyzing 7 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s). Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1598.223 ; gain = 0.000 INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. Synth Design complete, checksum: 91a2135 INFO: [Common 17-83] Releasing license: Synthesis 23 Infos, 3 Warnings, 0 Critical Warnings and 0 Errors encountered. synth_design completed successfully synth_design: Time (s): cpu = 00:00:24 ; elapsed = 00:00:27 . Memory (MB): peak = 1598.223 ; gain = 32.727 INFO: [Common 17-1381] The checkpoint 'C:/workspace/led_twinkle/led_twinkle.runs/synth_1/led_twinkle.dcp' has been generated. INFO: [runtcl-4] Executing : report_utilization -file led_twinkle_utilization_synth.rpt -pb led_twinkle_utilization_synth.pb INFO: [Common 17-206] Exiting Vivado at Sat Oct 14 17:29:59 2023...
"大中華程序員"及"大香港程序員"之定義
“紅色程序員”又或者”大中華程序員”之定義: “大香港程序員”之定義 2023-10-09 20:30:44
“紅色程序員”又或者”大中華程序員”之定義: “大香港程序員”之定義 2023-10-09 20:30:44
"紅色程序員"又或者"大中華程序員"之定義:
- 心中有中華民族復興之心, 感覺IT界被洋人入侵, 電腦太多西方軟件而不悅
- 在關鍵領域例如操作系統, 編譯器等等, 對於中國的落後感到極度沮喪, 從而投身研發
- 在研發的過程對於使用別人的library覺得羞恥, 所以什麼都想自己開發
"大香港程序員"之定義
- 基本上同大中華程序員沒什麼分別, 但覺得大陸仔無可能重振中華雄風
- 因為第一點所以組織北伐以圖振興中華
Funny Toy : Oscilloscope
I got this electronic toy from Taobao, i want to have more experience on soldering and putting different components on the PCB and making them work. After 3 hours in soldering and 1 hour in debugging, i finally make it works https://v.youku.com/v_show/id_XNjAyNDAwNDY2OA==.html?spm=a2hje.13141534.1_3.d_1&scm=20140719.manual.240103.video_XNjAyNDAwNDY2OA== All documents here 2023-10-09 14:39:29
Nucleo-L476RG DAC
2023-10-08 18:16:26
/* USER CODE BEGIN 2 */
HAL_DAC_Start(&hdac1, DAC_CHANNEL_1);
uint32_t x = 0;
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_1, DAC_ALIGN_12B_R, x);
HAL_Delay(100);
x+=100;
if (x == 1000) {
x = 0;
}
}
/* USER CODE END 3 */
砌機 : FPGA
Lattice FPGA比STM32簡單, 我應該可以搞得掂 用户手册： https://github.com/wuxx/icesugar-nano/blob/main/README.mdwin7串口驱动： https://github.com/wuxx/icesugar-nano/blob/main/doc/usbser.inf原理图及源码： https://github.com/wuxx/icesugar-nano 主要component其實得兩個: FGPA同粒Flash 2023-10-05 18:03:36
Lattice FPGA比STM32簡單, 我應該可以搞得掂
用户手册： https://github.com/wuxx/icesugar-nano/blob/main/README.md
win7串口驱动： https://github.com/wuxx/icesugar-nano/blob/main/doc/usbser.inf
原理图及源码： https://github.com/wuxx/icesugar-nano
主要component其實得兩個: FGPA同粒Flash
CIO現象之觀察
已經同大部份嘅公營機構做過生意, 公營機構嘅IT部技術同hands-on氣氛同以下元素嘅關係 同以下元素有關係, 我解釋唔到點解, 但觀察得之係有一定關係 2023-10-04 10:23:26
已經同大部份嘅公營機構做過生意, 公營機構嘅IT部技術同hands-on氣氛同以下元素嘅關係 同以下元素有關係, 我解釋唔到點解, 但觀察得之係有一定關係 2023-10-04 10:23:26
已經同大部份嘅公營機構做過生意, 公營機構嘅IT部技術同hands-on氣氛同以下元素嘅關係
- 同out唔outsource無關, 好多人以為outsource越多越唔hands-on, 其實唔係
- 同學歷無關, 唔係學歷越高越好, 亦唔係越高越廢, 以我觀察其實係無任何關係
- 同大學排名無關, 唔係啲員工係三大畢業就越好, 亦唔係三大就差, 係無任何關係
- 同員工年齡分佈一啲關係都無
- 同員工留學外國比例一啲關係都無
同以下元素有關係, 我解釋唔到點解, 但觀察得之係有一定關係
- 同CIO表現出對技術嘅熱情有直接關係, CIO會講下talk教下人, 成間公司啲人普遍會hands-on
- 同間公營機構有無錢有關係, 越有錢越做大project嘅越唔hands-on. 反而做細project多嘅會更hands-on
- 用cloud (gov cloud除外)嘅更多嘅會更hands-on, 用on-prem多嘅機構普遍會比佢地啲唔hands-on嘅infra佬張技術氣氛破壞殆盡
同香港啲阿叔嘅交流指引
香港有好多阿叔，業界學界商界全部都係由阿叔為主，同佢地只要係有少少聯絡，你都要好小心，以下是指引 香港唔存在”前輩”呢一層，我唔係話香港無人夠資格稱做前輩，而係真正稱得上係前輩嘅人太少，唔足以叫做一代人。所以要摒棄幻想，唔好諗住搞到啲阿叔去指導你，唔點你都算係咁。香港啲中小學生同年青人未知呢個事實，所以寫呢篇文。 2023-10-01 00:53:48
香港有好多阿叔，業界學界商界全部都係由阿叔為主，同佢地只要係有少少聯絡，你都要好小心，以下是指引 香港唔存在”前輩”呢一層，我唔係話香港無人夠資格稱做前輩，而係真正稱得上係前輩嘅人太少，唔足以叫做一代人。所以要摒棄幻想，唔好諗住搞到啲阿叔去指導你，唔點你都算係咁。香港啲中小學生同年青人未知呢個事實，所以寫呢篇文。 2023-10-01 00:53:48
香港有好多阿叔，業界學界商界全部都係由阿叔為主，同佢地只要係有少少聯絡，你都要好小心，以下是指引
- 合作 - 如果你同啲阿叔合作，記得諗清諗楚先好開口，因為你一問啲阿叔合唔合作，佢地就會覺得你應該stick to佢地，係未經佢地同意之下你同其他阿叔傾，佢地會好唔高興，從而唔妥你。佢地會覺得你係佢嘅人，你呢種行為同去滾無分別，佢地會嬲，就算佢地未應承同你合作，佢地都會係咁諗
- 傾談 - 你同阿叔交談，千其唔好俾佢地知你同其他阿叔講過你同佢傾嘅內容，因為佢同你傾計好多時都用啲白白地痴嘅經驗去大你，佢地好驚其他人知佢啲所謂經驗其實根本無人信，佢地好驚人知道佢地無料。所以唔會容許其他阿叔知佢同你講過啲乜。由此可以，你亦都唔好係阿叔面前quote其他阿叔講過嘅野，佢地會覺得侮辱緊佢。阿叔係要你崇拜佢，跪佢，學佢。呢點要揸得好緊。
- 研究 - 你同阿叔講你嘅研究，本質上你要睇下醫生。如果你真係要講，你要留意班香港班阿叔最叻就係叫你唔好做，佢地會先講啲經驗再加啲弱智所謂證據然後叫你放棄，佢地好想見到佢聽佢講之後就放棄，有種指點江山嘅感覺，由佢地嘅表情可以感覺到佢地好high，好似諸葛亮講一兩句就成隊兵聽佢點咁，嗰種high嘅感覺百分之九十九嘅阿叔都好鐘意，你唔好say no，最好就話"係喎，我行錯左方向"，咁佢地就high爆喇
- 生意 - 無論佢窮到見鬼都好，班阿叔總會吹自己"以前“做生意有幾勁，識幾多人，記住，你要附和，千其唔好提出質擬，亦都唔好叫佢介紹人你識，因為只會俾機會佢地揾你着數
香港唔存在"前輩"呢一層，我唔係話香港無人夠資格稱做前輩，而係真正稱得上係前輩嘅人太少，唔足以叫做一代人。所以要摒棄幻想，唔好諗住搞到啲阿叔去指導你，唔點你都算係咁。香港啲中小學生同年青人未知呢個事實，所以寫呢篇文。
同香港嘅IT人溝通之正確方法
香港啲技術人好小氣, 所以同佢地交流要好小心, 以下列出必需要注意嘅重點 2023-09-17 16:31:09
香港啲技術人好小氣, 所以同佢地交流要好小心, 以下列出必需要注意嘅重點 2023-09-17 16:31:09
香港啲技術人好小氣, 所以同佢地交流要好小心, 以下列出必需要注意嘅重點
- 唔好講佢地用緊嘅技術壞話, 雖然傻嘅都知有批評先有進步, 但佢地係唔會接受批評, 你一批落去佢地就會好小氣, 會係facebook到unfriend你, 會block左你
- 啲技術人好鐘意係自己都未做過嘅情況下對你作出指導, 你千其唔好咁直接話佢地根本未做過, 佢地一定會嬲你一世, 佢地好小氣
- 啲阿叔, 由其是自命識少少技術嘅阿叔, 你唔好質疑佢地嘅經驗, 就算你知佢地啲經驗係流嘅都唔好比佢地知你知道佢地流, 否則佢地會不停用自己啲經驗去大你, 好哂自己時間, 總之佢地話乜就乜千其唔好駁嘴
- 啲後生啲嘅技術潮童好鐘意自稱full stack, 你同佢地講野一定要表現出認同, 唔好笑, 否則佢地好大機會會發癲
- 千其唔好攞佢地做緊嘅界別同另一個界別比較, 佢地覺得自己個界別係天下無敵, 舉個例子, in-house佬會認為做in-house技術最高, 做R&D又會認為自己技術最神聖. 總之唔好比較, 佢地話係就係
- 永遠唔好係python兒童到講python唔好, 你要話python係無敵嘅, 否則會被圍攻
- IT老細面好鐘意話自己靠技術發達, 但其實盲嘅都知佢地靠sales做trade, 佢地間野同技術一啲關係都無, 但你唔好踢爆, 會死得好慘
- IT界好多講野佬成日係傳媒到講野, 唔好問佢地係邊一方面嘅專家, 佢地會唔妥你, 因為人地年年變身做唔同嘅專家, 你問等同惡意挑戰, 會死的
- IT界好多讀IT出身但其實係讀屎片嘅sales director, 唔好問佢地點解做sales而唔做tech, 佢地會以為你串佢, 唔好咁做
- 係三大畢業嘅IT人面前唔好話三大, 佢地會聯合埋一齊搞你, 總之三大係全世界最好嘅大學
Multimeter book, teach you how to build one
2023-09-16 14:06:13
教學理念
其實香港啲IT教育大家心裏邊都覺得唔係太work, 至於點解唔work你問啲學生就知. 所以我打算宣揚呢個教學理念, 但係呢個理念太難(右圖), 所以先執行一個簡化版理念(左圖). 首先我地盡可能用自己開發嘅tool去教學生, 呢一點難度好大, 因為要求位老師真係實際咁開發到舊野出黎, 完整程度要足以教學, 咁樣可以收兩個好處, 老師保證足夠handson, 學生保證學到最handson嘅skill. 做到呢樣野相信教學會煥燃一新. 香港太多課程啲老師照稿讀, 根本自己就對自己所教嘅野無足夠深度嘅認識. 舉個例子, MIT嘅Operating system課程不單止老師可以創造一個OS, 佢地亦都可以帶領學生去創造一個OS, 而香港嘅OS課程只係吹下powerpoint, 抽少少concept寫少少C++就算數, 無論完整性都沒法同外國比. 又例如香港教compiler嗰班老師又有幾多個可以寫到一個完整compiler出黎, 咁樣仲走去教人唔知會教到啲咩知識出黎. 當老師真係攞得起自己舊野去教, 啲學生又學得識, 最後一步就係要啲學生投入返去開發個project, 咁老師同學生就會有一個可以共同進步嘅圈. 收到嘅好處就係啲學生唔會覺得老師無料, 老師唔會覺得學生廢. 係香港提出一啲會帶來改變嘅意見好危險, 我而家提出呢個理念肯定都好多人跳出黎插我, 佢地嘅原因不外乎就係話用人地嘅tool去教一樣收到好效果, 呢一點我都懶得去反駁. 2023-09-04 15:55:43
其實香港啲IT教育大家心裏邊都覺得唔係太work, 至於點解唔work你問啲學生就知. 所以我打算宣揚呢個教學理念, 但係呢個理念太難(右圖), 所以先執行一個簡化版理念(左圖). 首先我地盡可能用自己開發嘅tool去教學生, 呢一點難度好大, 因為要求位老師真係實際咁開發到舊野出黎, 完整程度要足以教學, 咁樣可以收兩個好處, 老師保證足夠handson, 學生保證學到最handson嘅skill. 做到呢樣野相信教學會煥燃一新. 香港太多課程啲老師照稿讀, 根本自己就對自己所教嘅野無足夠深度嘅認識. 舉個例子, MIT嘅Operating system課程不單止老師可以創造一個OS, 佢地亦都可以帶領學生去創造一個OS, 而香港嘅OS課程只係吹下powerpoint, 抽少少concept寫少少C++就算數, 無論完整性都沒法同外國比. 又例如香港教compiler嗰班老師又有幾多個可以寫到一個完整compiler出黎, 咁樣仲走去教人唔知會教到啲咩知識出黎. 當老師真係攞得起自己舊野去教, 啲學生又學得識, 最後一步就係要啲學生投入返去開發個project, 咁老師同學生就會有一個可以共同進步嘅圈. 收到嘅好處就係啲學生唔會覺得老師無料, 老師唔會覺得學生廢.
係香港提出一啲會帶來改變嘅意見好危險, 我而家提出呢個理念肯定都好多人跳出黎插我, 佢地嘅原因不外乎就係話用人地嘅tool去教一樣收到好效果, 呢一點我都懶得去反駁.
Build a programmer for ATF22V10C using Arduino
https://www.ecstaticlyrics.com/electronics/ATF22V10C/ https://github.com/ole00/afterburner https://github.com/hansake/PLD_programmer 2023-09-03 19:12:03
https://www.ecstaticlyrics.com/electronics/ATF22V10C/ https://github.com/ole00/afterburner https://github.com/hansake/PLD_programmer 2023-09-03 19:12:03
Arduino read/write AT24C256
Many examples not work from google, it is because it needs a delay after write operand, so i put delay(100) 2023-08-31 17:16:06
Many examples not work from google, it is because it needs a delay after write operand, so i put delay(100) 2023-08-31 17:16:06
Many examples not work from google, it is because it needs a delay after write operand, so i put delay(100)
#include <Wire.h>
#define eeprom 0x50 //defines the base address of the EEPROM
void setup() {
Wire.begin(); //creates a Wire object
Serial.begin(9600);
unsigned int address = 0; //first address of the EEPROM
// Serial.println("We write the zip code 22222, a zip code");
// for (address = 0; address < 5; address++)
// writeEEPROM(eeprom, address, '2'); // Writes 22222 to the EEPROM
// for (address = 0; address < 5; address++) {
// Serial.print(readEEPROM(eeprom, address), HEX);
// }
writeEEPROM(eeprom, address, 0x19);
Serial.print(readEEPROM(eeprom, address), HEX);
}
void loop() {
/*there's nothing in the loop() function because we don't want the arduino to
repeatedly write the same thing to the EEPROM over and over.
We just want a one-time write, so the loop() function is avoided with EEPROMs.*/
}
//defines the writeEEPROM function
void writeEEPROM(int deviceaddress, unsigned int eeaddress, byte data) {
Wire.beginTransmission(deviceaddress);
Wire.write((int)(eeaddress >> 8)); //writes the MSB
Wire.write((int)(eeaddress & 0xFF)); //writes the LSB
Wire.write(data);
Wire.endTransmission();
delay(100);
}
//defines the readEEPROM function
byte readEEPROM(int deviceaddress, unsigned int eeaddress) {
byte rdata = 0xFF;
Wire.beginTransmission(deviceaddress);
Wire.write((int)(eeaddress >> 8)); //writes the MSB
Wire.write((int)(eeaddress & 0xFF)); //writes the LSB
Wire.endTransmission();
Wire.requestFrom(deviceaddress, 1);
if (Wire.available())
rdata = Wire.read();
delay(100);
return rdata;
}
Quantr-Logic + PLD
We are thinking of synthesis logic into FPGA but the task is quite complex, We found a new way to do what we want: We generate the jedec file and let the end user burn it into PLD. This brings us the ability to design logic from Quantr-Logic, kick a button, and burn it into […] 2023-08-28 16:09:12
We are thinking of synthesis logic into FPGA but the task is quite complex, We found a new way to do what we want: We generate the jedec file and let the end user burn it into PLD. This brings us the ability to design logic from Quantr-Logic, kick a button, and burn it into PLD.
Since JEDEC is quite human-readable, and students can learn what fuse to burn inside the PLD to form their logic, this experience is great for students to feel what programmable logic does. All they need is a programmer to burn it to chip.
JEDEC hack
The jedec file is easy to decode:
Shatin IVE library has great books
Shatin IVE library has great FPGA books, I think they have a long history in electronics. 2023-08-24 01:06:12
Shatin IVE library has great FPGA books, I think they have a long history in electronics.
ATMEGA328P default fuse
2023-08-23 19:15:03
RISC-V Day Hong Kong 2023
thank you Professor Ray invited us to join 2023-08-22 17:44:33
thank you Professor Ray invited us to join
[rl_gallery id="5576"]
道教與IT
呢本書講道教, 其實IT同道教好多相似之處 1. 道教最開頭玩 [ 請雷 ] 同 [ 請聖 ], 因為朝庭有啲嘅做得唔好例如農業搞唔掂, 加上解釋唔到自然現象所以請神幫助. 道教認為自太初(姐係宇宙之初)有一啲叫天寶字符嘅野成形, 道教唔知呢啲圖形符號係乜黎, 只係知道佢有神力可以一用, 所以啲有道行嘅道士張佢寫係張紙到就可以用黎消災解難. 對比起IT, 啲IT人好多時都解釋唔到啲技術係乜, 公司唔掂無效率解決唔到, 班友搞唔掂唯由寫道符(Tender)請神, 但班友又唔神心請神變左請鬼. 呢本書都講如果道士寫符唔淨心就會走火入魔, 請左啲邪鬼上黎. 2. 道教根本係一個無乜哲學嘅宗教, 成單野就係一大群道士係到吹, 而道士同道士之間係無提出過任何質問, 總之你有你講我有我講, 大家唔好踢爆各玩各嘅, 成個宗教就係一個大型嘅俾面派對大家唔好阻住大家揾食. 你睇返而家IT界啲KOL, 個個都係講埋啲你阿媽係女人嘅野, 有時仲要講錯, 佢地係好唔鐘意有人對佢地提出質疑, 那怕個質疑只係一條簡簡單單嘅問題, 佢地都唔會回應而unfriend左你. 我試過問Emil Chan同方保僑係邊一方面嘅專家, 佢地都即刻block Q左我. 呢一點同道教嘅道士非常相似. 3. 皇帝有問題問啲道士, 例如天下係點形成, 運勢有咩走法咁, 啲道士會答到超級high level完全落唔到地嗰隻. 對比係印度同希臘啲哲學家, 使佢地答唔到, 佢地都會嘗試將個問題break down去啲細啲嘅問題去再解釋, 而道教係只會將你指來指去, 一時就太初點點點, 一時就啲鬼神點點點, […] 2023-08-20 02:32:31
呢本書講道教, 其實IT同道教好多相似之處
1. 道教最開頭玩 [ 請雷 ] 同 [ 請聖 ], 因為朝庭有啲嘅做得唔好例如農業搞唔掂, 加上解釋唔到自然現象所以請神幫助. 道教認為自太初(姐係宇宙之初)有一啲叫天寶字符嘅野成形, 道教唔知呢啲圖形符號係乜黎, 只係知道佢有神力可以一用, 所以啲有道行嘅道士張佢寫係張紙到就可以用黎消災解難. 對比起IT, 啲IT人好多時都解釋唔到啲技術係乜, 公司唔掂無效率解決唔到, 班友搞唔掂唯由寫道符(Tender)請神, 但班友又唔神心請神變左請鬼. 呢本書都講如果道士寫符唔淨心就會走火入魔, 請左啲邪鬼上黎.
2. 道教根本係一個無乜哲學嘅宗教, 成單野就係一大群道士係到吹, 而道士同道士之間係無提出過任何質問, 總之你有你講我有我講, 大家唔好踢爆各玩各嘅, 成個宗教就係一個大型嘅俾面派對大家唔好阻住大家揾食. 你睇返而家IT界啲KOL, 個個都係講埋啲你阿媽係女人嘅野, 有時仲要講錯, 佢地係好唔鐘意有人對佢地提出質疑, 那怕個質疑只係一條簡簡單單嘅問題, 佢地都唔會回應而unfriend左你. 我試過問Emil Chan同方保僑係邊一方面嘅專家, 佢地都即刻block Q左我. 呢一點同道教嘅道士非常相似.
3. 皇帝有問題問啲道士, 例如天下係點形成, 運勢有咩走法咁, 啲道士會答到超級high level完全落唔到地嗰隻. 對比係印度同希臘啲哲學家, 使佢地答唔到, 佢地都會嘗試將個問題break down去啲細啲嘅問題去再解釋, 而道教係只會將你指來指去, 一時就太初點點點, 一時就啲鬼神點點點, 總之就亂點一通. 你再睇返我地而家啲KOL, 佢地講野永遠係企係國家同人類層面去講所有野, 你叫佢地deep啲講下啲實際技術, 佢地係做唔到嘅. 好似而家興人工智能, 佢地會開show講人工智能對人類有咩影響, 大佬呀你識條毛咩. 而香港嘅傳媒基本上0Code, 佢地根本分唔到啲講野嘅人到底有幾認識隻技術, 所以成個IT道教化.
https://www.books.com.tw/products/0010863772
Funny lesson today to build few 8-bit registers
Teaching teens for electronics is a rewarding and fulfilling experience. Electronics is a fascinating field that combines creativity, logic, and problem-solving. By teaching teens for electronics, you can help them discover the joy of learning new skills, creating useful devices, and exploring the world of technology. You can also inspire them to pursue their passions, […] 2023-08-17 23:57:53
Teaching teens for electronics is a rewarding and fulfilling experience. Electronics is a fascinating field that combines creativity, logic, and problem-solving. By teaching teens for electronics, you can help them discover the joy of learning new skills, creating useful devices, and exploring the world of technology. You can also inspire them to pursue their passions, develop their confidence, and prepare them for future opportunities. Teaching teens for electronics can also make you happy, as you see them grow, improve, and achieve their goals. You can share your knowledge, enthusiasm, and experience with them, and learn from their perspectives, questions, and feedback. Teaching teens for electronics is a way of making a positive difference in their lives and in the world.
獅子會IT部
15.8.2023IT 小姐組一次工作會議在IT小組主席張民傑獅兄、總監陸嘉暉獅兄、第二副總監梁鳳華獅姐 領導下訂定各項IT工作，肯定今年的工作計劃賣個關子：好快會有重要IT事情宣佈 2023-08-17 23:43:42
15.8.2023
IT 小姐組一次工作會議
在IT小組主席張民傑獅兄、總監陸嘉暉獅兄、第二副總監梁鳳華獅姐 領導下
訂定各項IT工作，肯定今年的工作計劃
賣個關子：好快會有重要IT事情宣佈
香港好少教授做實作嘅原因
係香港，由其是CS同EE你好少見到教授做implement嘅原因不外乎以下兩個 如何改變呢一個現實 要有一群死士執行以下任務 2023-08-16 10:15:41
係香港，由其是CS同EE你好少見到教授做implement嘅原因不外乎以下兩個 如何改變呢一個現實 要有一群死士執行以下任務 2023-08-16 10:15:41
係香港，由其是CS同EE你好少見到教授做implement嘅原因不外乎以下兩個
- 篇論文根本流嘅，好多時都只係係原有嘅理論上面撩一啲細位做下少少更改就發出去，因為要chok篇野發表，所以撩出黎嗰啲細位會好冷門同古怪，可以咁講係無implement價值，所以香港嘅教授們甚少去implement。加上係被佢地撩果啲原有理論上佢地根本唔係融會貫通，所以下層都implement唔到，上層又點會implement到呢。好多基礎嘅library人地俾哂source code佢地，唔好話睇唔明，佢地直頭係唔會睇。所以香港嘅教授普遍係對基礎知識得個知字，好似酒樓知客咁款，遠遠談唔上係奴駕到嗰隻。
- 教授手料無實戰能力，其實我識好多教授同phd都真係連個for loop都寫唔到。佢地終其一生係人地嘅理論上挖啲野出黎發論文，佢地會好自豪咁話俾你知理論同實作係可以分開，其實你可以睇下bekerley 同mit嘅論文，睇下人地會唔會implement再下結論。香港永遠就係張一啲明明係一體嘅concept分開從而搞到一pat屎咁，例如coding同management分開就會出0CodePM，理論同實作分開就會出0 Code教授。明明係applied science都可以成世唔諗implement。
如何改變呢一個現實
要有一群死士執行以下任務
- 誓死同佢地合作係科研領域到有實際輸出, 佢地見到有好處就有機會會諗implement
- 死士要頂住佢地啲性格同行為, 誓死撐住隻船向前行, 但中途肯定會有極大嘅心理壓力
- 努力為佢地提供技術支援, 但佢地只會研究佢地啲paper, 所以你要implement埋佢地嗰份, 包括底層, 所以技術難度極大
教育界未必係教育界，性格黎講
香港嘅科研唔掂，由其是教育界嘅科研，因為佢地無”愛”。香港教育界當然有好多熱心教育嘅老師，但亦有好多人令教育界唔似教育界 1. 老師未必愛好和平 通常真係鐘意教人嘅人都會係比較和平，始終教人係一件神聖嘅事業。但係好多院校內鬥好嚴重，好多時候啲老師好鐘意鬥來鬥去，所以佢地一啲都唔愛好和平。 2. 其實教育界好多時都無乜包容 好多時候學生做錯少少野佢地會發火，無乜包容可言，學校理應係一個提供無限犯錯機會嘅地方，但相反，香港有好多學院根本唔容許人犯錯，無論係學生或者老師都係。舉個例子，youtube上大吧流浪教師，佢地都唔好話做錯野，只要做左少少人地睇唔順眼嘅野，就會被人搞掂。好多老師佢地嘅性格比公務員更加公務員，有突發事件，佢地會嬲。有啲唔係佢地plan左而出現左嘅事，佢地會發癲。總之佢地嘅性格係要跟預定計劃而行，任何人任何事只要中途殺出，佢地就會發狂。所以無論對人對事都無乜包容。 3. 老師根本就好小氣 學校呢個環境其實係一個好好俾人地小氣嘅環境，老師對上得幾個人佢地在乎，其它身邊嘅所有老師佢地可以盡性小氣一翻，小氣亦都可以好長久，姐係記仇。因為咁樣好多老師都無乜人際能力，舉個例子，兜口兜面打照乎可以無反應。 4. 香港嘅老師係按本子辦事嘅生物 一句講哂，跟課程教跟學校規舉。學校想點就點，大家打份工。外國老師因材施教係香港唔會發生，可以咁講，個種程度唔同。香港老師都會認為自己會因材施教，但變幅可能係10%，外國嘅係50%係香港唔會發生。點因材施教都好，功課唔會改，考試亦都會照考。 咁同香港嘅學院研究下啲野可唔可行呢？ 無話唔可行嘅，六合彩都有人中啦。但我嘅真實睇法係呢個機會好渺茫。原因係咁：唔愛好和平嘅老師通常唔識做人，科研要有長久而穩定嘅人際關係，佢地唔會俾到你。無包容嘅學院你亦都唔洗哂時間去遊說，因為佢地個氣氛唔係做科研，佢地係打工。加上無包容度嘅老師無可能同你一齊研究一樣野好耐，因為科研要經歷失敗，佢地一經歷失敗就會發癲。你唔好同按本子辦事嘅老師講推廣科技，教書只係一份工作，除非好快可以幫到佢升職，否則你都係唔好哂時間。 其實掉返轉頭諗，如果香港嘅學院真係咁識得同人合作搞科研，全世界一早排隊黎揾佢地啦，洗等你咩。佢地一定係有一啲被全世界都唾棄嘅缺點，否則香港唔會係而家咁嘅局面。 2023-08-16 01:10:57
香港嘅科研唔掂，由其是教育界嘅科研，因為佢地無”愛”。香港教育界當然有好多熱心教育嘅老師，但亦有好多人令教育界唔似教育界 1. 老師未必愛好和平 通常真係鐘意教人嘅人都會係比較和平，始終教人係一件神聖嘅事業。但係好多院校內鬥好嚴重，好多時候啲老師好鐘意鬥來鬥去，所以佢地一啲都唔愛好和平。 2. 其實教育界好多時都無乜包容 好多時候學生做錯少少野佢地會發火，無乜包容可言，學校理應係一個提供無限犯錯機會嘅地方，但相反，香港有好多學院根本唔容許人犯錯，無論係學生或者老師都係。舉個例子，youtube上大吧流浪教師，佢地都唔好話做錯野，只要做左少少人地睇唔順眼嘅野，就會被人搞掂。好多老師佢地嘅性格比公務員更加公務員，有突發事件，佢地會嬲。有啲唔係佢地plan左而出現左嘅事，佢地會發癲。總之佢地嘅性格係要跟預定計劃而行，任何人任何事只要中途殺出，佢地就會發狂。所以無論對人對事都無乜包容。 3. 老師根本就好小氣 學校呢個環境其實係一個好好俾人地小氣嘅環境，老師對上得幾個人佢地在乎，其它身邊嘅所有老師佢地可以盡性小氣一翻，小氣亦都可以好長久，姐係記仇。因為咁樣好多老師都無乜人際能力，舉個例子，兜口兜面打照乎可以無反應。 4. 香港嘅老師係按本子辦事嘅生物 一句講哂，跟課程教跟學校規舉。學校想點就點，大家打份工。外國老師因材施教係香港唔會發生，可以咁講，個種程度唔同。香港老師都會認為自己會因材施教，但變幅可能係10%，外國嘅係50%係香港唔會發生。點因材施教都好，功課唔會改，考試亦都會照考。 咁同香港嘅學院研究下啲野可唔可行呢？ 無話唔可行嘅，六合彩都有人中啦。但我嘅真實睇法係呢個機會好渺茫。原因係咁：唔愛好和平嘅老師通常唔識做人，科研要有長久而穩定嘅人際關係，佢地唔會俾到你。無包容嘅學院你亦都唔洗哂時間去遊說，因為佢地個氣氛唔係做科研，佢地係打工。加上無包容度嘅老師無可能同你一齊研究一樣野好耐，因為科研要經歷失敗，佢地一經歷失敗就會發癲。你唔好同按本子辦事嘅老師講推廣科技，教書只係一份工作，除非好快可以幫到佢升職，否則你都係唔好哂時間。 其實掉返轉頭諗，如果香港嘅學院真係咁識得同人合作搞科研，全世界一早排隊黎揾佢地啦，洗等你咩。佢地一定係有一啲被全世界都唾棄嘅缺點，否則香港唔會係而家咁嘅局面。 2023-08-16 01:10:57
香港嘅科研唔掂，由其是教育界嘅科研，因為佢地無"愛"。香港教育界當然有好多熱心教育嘅老師，但亦有好多人令教育界唔似教育界
1. 老師未必愛好和平
通常真係鐘意教人嘅人都會係比較和平，始終教人係一件神聖嘅事業。但係好多院校內鬥好嚴重，好多時候啲老師好鐘意鬥來鬥去，所以佢地一啲都唔愛好和平。
2. 其實教育界好多時都無乜包容
好多時候學生做錯少少野佢地會發火，無乜包容可言，學校理應係一個提供無限犯錯機會嘅地方，但相反，香港有好多學院根本唔容許人犯錯，無論係學生或者老師都係。舉個例子，youtube上大吧流浪教師，佢地都唔好話做錯野，只要做左少少人地睇唔順眼嘅野，就會被人搞掂。好多老師佢地嘅性格比公務員更加公務員，有突發事件，佢地會嬲。有啲唔係佢地plan左而出現左嘅事，佢地會發癲。總之佢地嘅性格係要跟預定計劃而行，任何人任何事只要中途殺出，佢地就會發狂。所以無論對人對事都無乜包容。
3. 老師根本就好小氣
學校呢個環境其實係一個好好俾人地小氣嘅環境，老師對上得幾個人佢地在乎，其它身邊嘅所有老師佢地可以盡性小氣一翻，小氣亦都可以好長久，姐係記仇。因為咁樣好多老師都無乜人際能力，舉個例子，兜口兜面打照乎可以無反應。
4. 香港嘅老師係按本子辦事嘅生物
一句講哂，跟課程教跟學校規舉。學校想點就點，大家打份工。外國老師因材施教係香港唔會發生，可以咁講，個種程度唔同。香港老師都會認為自己會因材施教，但變幅可能係10%，外國嘅係50%係香港唔會發生。點因材施教都好，功課唔會改，考試亦都會照考。
咁同香港嘅學院研究下啲野可唔可行呢？
無話唔可行嘅，六合彩都有人中啦。但我嘅真實睇法係呢個機會好渺茫。原因係咁：唔愛好和平嘅老師通常唔識做人，科研要有長久而穩定嘅人際關係，佢地唔會俾到你。無包容嘅學院你亦都唔洗哂時間去遊說，因為佢地個氣氛唔係做科研，佢地係打工。加上無包容度嘅老師無可能同你一齊研究一樣野好耐，因為科研要經歷失敗，佢地一經歷失敗就會發癲。你唔好同按本子辦事嘅老師講推廣科技，教書只係一份工作，除非好快可以幫到佢升職，否則你都係唔好哂時間。
其實掉返轉頭諗，如果香港嘅學院真係咁識得同人合作搞科研，全世界一早排隊黎揾佢地啦，洗等你咩。佢地一定係有一啲被全世界都唾棄嘅缺點，否則香港唔會係而家咁嘅局面。
We have built the 8 bits register
Teenager computer architecture free lessons 2023-08-10 13:55:35
Teenager computer architecture free lessons
VTC個online library係無敵嘅
Download論文一個click, 至少比Cityu無敵 2023-08-09 20:51:40
Download論文一個click, 至少比Cityu無敵
COSCUP 2023
多謝hkcota同oshk安排, 今次台灣可以係coscup 2023講個talk實在開心. 2023-08-07 14:18:49
多謝hkcota同oshk安排, 今次台灣可以係coscup 2023講個talk實在開心.
Support debug using vscode for xv6-riscv
launch.json in “.vscode” folder tasks.json “.vscode” folder Remove “-O” in Makefile run: set some breakpoints in vscode make qemu-gdb click the “run” button in vscode, see below 2023-07-31 15:45:57
launch.json in ".vscode" folder
{
"version": "0.2.0",
"configurations": [
{
"type": "gdb",
"request": "attach",
"name": "Attach to gdbserver",
"gdbpath": "/opt/riscv/bin/riscv64-unknown-elf-gdb",
"executable": "kernel/kernel",
"target": "localhost:26000",
"remote": true,
"printCalls": true,
"cwd": "${workspaceRoot}",
"valuesFormatting": "parseText"
}
]
}
tasks.json ".vscode" folder
{
"tasks": [
{
"label": "Build",
"type": "shell",
"command": "make",
"args": [],
"group": "build",
"problemMatcher": [
"$gcc"
]
},
{
"type": "cppbuild",
"label": "C/C++: gcc build active file",
"command": "/usr/bin/gcc",
"args": [
"-fdiagnostics-color=always",
"-g",
"${file}",
"-o",
"${fileDirname}/${fileBasenameNoExtension}"
],
"options": {
"cwd": "${fileDirname}"
},
"problemMatcher": [
"$gcc"
],
"group": {
"kind": "build",
"isDefault": true
},
"detail": "Task generated by Debugger."
}
],
"version": "2.0.0"
}
Remove "-O" in Makefile
run:
set some breakpoints in vscode
make qemu-gdb
click the "run" button in vscode, see below
Good bye IVE 21st July 2023
2023-07-22 09:24:42
2023-07-22 09:24:42
Elec components related to FPGA
2023-07-21 21:20:03
Nand / Nor
i know any gate can convert to NAND or NOR, asked many time why people always use NAND instead of NOR, no one can answer, but i found the answer now. NAND need voltage, NOR need current. 2023-07-19 12:25:31
i know any gate can convert to NAND or NOR, asked many time why people always use NAND instead of NOR, no one can answer, but i found the answer now. NAND need voltage, NOR need current.
香港搞open source搞唔起的原因
香港永遠唔會出到外國咁成功同大型的open source project, 原因如下: 原因一: 香港無錢 香港人最驚被人話無錢, 但係開源呢單野上正正就係無錢, 可以話係窮到一蚊都無嗰種. 唔信你可以申請下創新科技署同科學園, 你話你搞open source睇下批唔批到條毛俾你. 原因二: 香港人無堅持力同投入度 你可能會反駁香港人都搞好多open source project, 但係得罪講句啲project係停留係小工具嘅層面(我唔係串, 我只係講事實), 係級數同規模上無得同外國比. 至於點解呢世做小工具, 原因不外乎香港人堅持同投入度都極度低下, 無人可以做一單野用十年做單位. 原因三: 香港人好鐘意得個噏字 香港真係太多阿叔, 可以睇 創科阿叔心理分析 原因四: 香港人啲技術低 HK developer = App developer, 個底係打工仔一名, 啲咩科學改變世界唔會關佢地事, 佢地只關心轉工. 原因五: 香港學界無力 香港嘅學界基本上一蚊都揾唔到sponsor, 如果你揾啲教授合作, 佢地唔係自己着數哂就唔會做, 一係就係咁得個吹字. 講技術, 香港學界有幾多料大家都知, 出論文可能得, 但要開發啲實際野唔洗諗. 原因六: 香港無一群有科學使命嘅老細 所有老細為賺錢, 佢地可能都係讀科學出身, 但個底唔係科學人, 可以話一啲科學精神都無. 佢地搞野要三個月後攞出去賣, […] 2023-07-18 13:15:06
香港永遠唔會出到外國咁成功同大型的open source project, 原因如下: 原因一: 香港無錢 香港人最驚被人話無錢, 但係開源呢單野上正正就係無錢, 可以話係窮到一蚊都無嗰種. 唔信你可以申請下創新科技署同科學園, 你話你搞open source睇下批唔批到條毛俾你. 原因二: 香港人無堅持力同投入度 你可能會反駁香港人都搞好多open source project, 但係得罪講句啲project係停留係小工具嘅層面(我唔係串, 我只係講事實), 係級數同規模上無得同外國比. 至於點解呢世做小工具, 原因不外乎香港人堅持同投入度都極度低下, 無人可以做一單野用十年做單位. 原因三: 香港人好鐘意得個噏字 香港真係太多阿叔, 可以睇 創科阿叔心理分析 原因四: 香港人啲技術低 HK developer = App developer, 個底係打工仔一名, 啲咩科學改變世界唔會關佢地事, 佢地只關心轉工. 原因五: 香港學界無力 香港嘅學界基本上一蚊都揾唔到sponsor, 如果你揾啲教授合作, 佢地唔係自己着數哂就唔會做, 一係就係咁得個吹字. 講技術, 香港學界有幾多料大家都知, 出論文可能得, 但要開發啲實際野唔洗諗. 原因六: 香港無一群有科學使命嘅老細 所有老細為賺錢, 佢地可能都係讀科學出身, 但個底唔係科學人, 可以話一啲科學精神都無. 佢地搞野要三個月後攞出去賣, […] 2023-07-18 13:15:06
香港永遠唔會出到外國咁成功同大型的open source project, 原因如下:
原因一: 香港無錢
香港人最驚被人話無錢, 但係開源呢單野上正正就係無錢, 可以話係窮到一蚊都無嗰種. 唔信你可以申請下創新科技署同科學園, 你話你搞open source睇下批唔批到條毛俾你.
原因二: 香港人無堅持力同投入度
你可能會反駁香港人都搞好多open source project, 但係得罪講句啲project係停留係小工具嘅層面(我唔係串, 我只係講事實), 係級數同規模上無得同外國比. 至於點解呢世做小工具, 原因不外乎香港人堅持同投入度都極度低下, 無人可以做一單野用十年做單位.
原因三: 香港人好鐘意得個噏字
香港真係太多阿叔, 可以睇 創科阿叔心理分析
原因四: 香港人啲技術低
HK developer = App developer, 個底係打工仔一名, 啲咩科學改變世界唔會關佢地事, 佢地只關心轉工.
原因五: 香港學界無力
香港嘅學界基本上一蚊都揾唔到sponsor, 如果你揾啲教授合作, 佢地唔係自己着數哂就唔會做, 一係就係咁得個吹字. 講技術, 香港學界有幾多料大家都知, 出論文可能得, 但要開發啲實際野唔洗諗.
原因六: 香港無一群有科學使命嘅老細
所有老細為賺錢, 佢地可能都係讀科學出身, 但個底唔係科學人, 可以話一啲科學精神都無. 佢地搞野要三個月後攞出去賣, 六個月要回本, 一年內要大賺. 所以如果想靠佢地科水搞啲科研野, 唔洗諗.
Heltec Arduino super simple tutorial
Buy from here. Offical website. Steps to make it work in arduino: 3. Burn these examples To try the wifi example 2. Change the wifi ID and password, case sensitive 3. Run it and see the result in serial monitor, set the baudrate to 115200. It grab the html from outside, see the code then […] 2023-07-17 14:20:48
Buy from here. Offical website.
Steps to make it work in arduino:
- Read http://www.heltec.cn/wifi_kit_install/ and https://docs.heltec.org/en/node/esp32/quick_start.html
- My settings:
3. Burn these examples
To try the wifi example
- Create the http example, not the https one, the "BasicHttpsClient" not working.
2. Change the wifi ID and password, case sensitive
3. Run it and see the result in serial monitor, set the baudrate to 115200. It grab the html from outside, see the code then you know
Above it http client example, http server example is in below. Or search in google.
Arduino Nano V3.0 + NRF24L01
This little board is nearly the same size as nano but embedded with a NRF24L01, and also very cheap $4 USD. To make it works: The “RF24 > Scanner” will works like below 100% compatible with Arduino nano 2023-07-17 13:04:03
This little board is nearly the same size as nano but embedded with a NRF24L01, and also very cheap $4 USD. To make it works:
- All pins are the same as nano but used some pins to connect to NRF24L01
- RF24 example is below
- Bootload don't use "old"
The "RF24 > Scanner" will works like below
100% compatible with Arduino nano
CLB and IOB design
altera and xilinx probably copying each other 2023-07-16 18:10:27
altera and xilinx probably copying each other
Remote riscv-qemu gdb in vscode
3. Change the no of hart to 1 Result : Step over fully work 2023-07-15 16:08:04
- install https://marketplace.visualstudio.com/items?itemName=webfreak.debug
- create launch.json in .vscode folder
{
"version": "0.2.0",
"configurations": [
{
"type": "gdb",
"request": "attach",
"name": "Attach to gdbserver",
"gdbpath": "/opt/riscv/bin/riscv64-unknown-elf-gdb",
"executable": "kernel/kernel",
"target": "localhost:26000",
"remote": true,
"printCalls": true,
"cwd": "${workspaceRoot}",
"valuesFormatting": "parseText"
}
]
}
3. Change the no of hart to 1
ifndef CPUS CPUS := 1 endif
Result : Step over fully work
HVPP reset Arduino Nano fuses
https://radiokot.ru/circuit/digital/pcmod/72/ 2023-07-14 12:44:52
https://radiokot.ru/circuit/digital/pcmod/72/ 2023-07-14 12:44:52
Programming Arduino using STK500 ISP
STK500 is better than MKII since it supports high voltage programming, it can reset fuses from any status. Step 1: Install the driver. Must be version from date 7th Oct Plug in the USB, if it detected wrong driver, update it by select specific folder’. Need reboot the computer to take effect. Step 2: connect […] 2023-07-12 17:47:32
STK500 is better than MKII since it supports high voltage programming, it can reset fuses from any status.
Step 1: Install the driver. Must be version from date 7th Oct
Plug in the USB, if it detected wrong driver, update it by select specific folder'. Need reboot the computer to take effect.
Step 2: connect STK500 to Arduino. Use multimeter to check the pin, VCC and GND has 0V. The pins having 4V is NOT VCC and GND
I got a arduino nano from taobao but it is not ATMega328PB, becareful the MCU model
