Category: Computer Engineering

SEMU call graph

This graph generated by graphviz, helping students easier understand Professor Jim Huang’s SEMU RISC-V emulator

2023/02/27 0


講得好step by step

2023/02/10 0

QEMU PLIC call map

After hacking the qemu risc-v source code, here is the PLIC call map

2023/02/06 0

Export our data structure into logisim

Created the library to export our data structure into logisim, , part of our EDA tool

2023/02/04 0

Good HDL synthesis book

The first step of logic synthesis is call “HDL synthesis”, converting verilog into raw netlist.

2023/02/01 0

Good book on logic synthesis

These two papers are referenced by above book about HDL translator

2023/01/29 0

Cadence Install Guide

2023/01/19 0

ICESugar board unable to mount in ubuntu

If you unable to mount your icesugar board in ubuntu and saying this error “Not authorized to perform operation”, this link resolve it The below board only work with the extension board on right hand side, the left hand side one dont. I found out the chip in the middle is different, rhs…
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2022/12/15 0

Change qemu to use 16M ram for xv6-riscv

After testing, the minimal memory of xv6-riscv needed is 3MB

2022/10/30 0

Very good micro python board

2022/08/22 0

Tiny STM32 board (STM32F103C8T6) STM32F103C8T6

2022/08/16 0

Generate verilator coverage report in html

Remark: brew install iconv or apt-get install lcov

2022/08/06 0



2022/07/17 0

Clean Architecture

1. 一棟大廈不可能分成兩棟能完全獨立運作的大廈,但軟件通常由能獨立運作的小軟件所組成,所以有理由相信軟件工程比土木工程複雜 2. 軟件工程是內循環的,意思是用軟件A創造軟件B,之後又用軟件B改進軟件A,而土木工程是單向的,所以有理由相信軟件工程比土木工程複雜 3. 就算摩天大廈,起第一層和起第一百層的技術差不多,但軟件中不同層數的建築方法是完全不同,例如os層和web層,所以有理由相信軟件工程比土木工程複雜 4. 軟件工程中做同一件事的方法比土木工程多很多,所以有理由相信軟件工程比土木工程複雜

2022/06/26 0

Resolved ICESugar pro blink.v :

ERROR: Module rst_gen contains processes, which are not supported by JSON backend (run `proc` first). Edit Makefile $(TARGET).json: $(OBJS) # yosys -p “synth_ecp5 -json $@” $(OBJS) yosys -p “read_verilog -sv $<” -p “synth_ecp5 -json $@” $(OBJS)

2022/03/27 0

正点原子Mini STM32F103RCT6在STM32CubeMX中玩UART

正點原子的教程是在Keil, 如果要在STM32CubeMX裏玩UART可跟以下步驟 Step 1. Step 2. Comment the whole file Step 3. Add these 3 files from the CD Step 4. Modify usart.c , default example override fputc never works, we have to overrid _write Step 5. Add this

2022/03/25 0

Python read/write jtag via FTDI chip Read PWM Pins reference :

2022/03/03 0

Arduino Uno programme ATTiny85 works


2022/02/20 0

MRK Wifi 1010 serial is different

MRK Wifi 1010 serial is different than Nano and Uno, the usb in serial and in D13/14 are separate, so code them this way

2022/02/20 0

start point to build our own jtag for our risc-v cpu

After days of hacking, i finally found out there is a dummy driver in openocd. just ./configure –enable-dummy and run it by ./bin/openocd -c ‘interface dummy’ -c ‘adapter_khz 1’ , you can see the dummy driver is running and in the function “static int dummy_write(int tck, int tms, int tdi)”, we can manually toggle the…
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2022/02/13 0

Compile libsigrok and pulseview in windows by msys2

This is the tutorial to build libsigrok and pulseview in windows Download msys Open “MSYS2 MinGW x64”, don’t use “MSYS2 MSYS” 3. git clone 4. cd sigrok-utils/cross-compile/msys2 5. ./sigrok-native-msys2 prepare , it will auto install all necessary packages Compile libsigrok 6. git clone 7. cd libsigrok 8. ./ 9. vi configure and…
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2022/02/06 0

Openlane init files

If run fail, have to remove the “runs” folder before rerun, otherwise same error will be shown my_design.v config.tcl

2021/12/31 0

Arithmetic Circuits & Multipliers

2021/12/12 0


Synthesis-ed part of XV6 into Verilog

2021/10/13 0

Good web to learn RISC-V interrupt—-PLIC-%E4%BB%8B%E7%B4%B9—-%E4%B8%AD%E6%96%B7%E7%AF%87

2021/08/29 0

RISC-V Qemu memory mapping

2021/05/11 0

This file controls how “info register” in gdb

this file riscv-64bit-cpu.xml controls how “info register” printing values in gdb. I tried to add one entry to it to print the “PC” value one more time, it works

2021/04/04 0

RISC-V progress

挾左個vscode web版落我地個web到,開發埋自己個theme親返隻色。RISC-V asm個syntax highlight仲差少少。跟住就可以放俾澳洲啲大學生上黎係web到做RISC-V coding,simulator我部server應該頂到200-500人。

2021/03/08 0

Tutorial to use Hantek6022BE with Pulse

Step 1. Download pulseview Step 2. Make sure this button is poped out. Step 3. Install Zadig driver Step 4. Run pulseview, the device should be auto detected as “Saleae Logic”, but not “Hantek”, anyway it will works

2021/02/13 0



2021/02/05 0