Assembler Meetup #27, 2020/01/18
Peter : Adding support to “Label”. Rest of people keep encoding x86 instructions.
Assembler Meetup #26, 2019/12/28
Desmond completed encoded all “OR” instructions, that proves the encoding method is mature. We heading toward our first milestone, complete encode all intel basic instructions. Peter has added all test case. To see our progress, go to http://www.quantr.hk/asmweb
Assembler Meetup #24, 2019/12/14
Good progress on shorten the grammar file. Desmond join the translation. Peter pickup the pe generator task.
Assembler Meetup #23, 2019/12/07
Meet in MongKok. Mainly shorten the grammar. Jenny confirmed each instruction can be translated by same five functions. We confirmed if instruction has only one operand, we have to add byte/word/dword/qword, e.g.: inc byte [ax] And some instructions such as call doesn’t support all four combinations of byte/word/dword/qword, this “call byte [ax]” will report error…
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Assembler Meetup #22, 2019/11/30
Jenny teach me code translate Not sure our method is unify or not Trying to make the grammar file shorter and uniform
Verilog syntax conflict
I guess syntax conflict or not is depend on how fpga vendor implement their verilog compile, nothing about the verilog language specification
Assembler Dev #16 2019/10/12
We finalize our error handling method, in both antlr grammar and java instruction “ADC” fully encoded, but still some combination mis-encoded. That means nasm don’t encode it, but we do https://www.quantr.hk/asmweb , our new testing site is launched
Getting started with RISC-V
https://dantalion.nl/en/getting-started-with-risc-v/ So you have heard of this RISC-V thing typically talked about in the context of microprocessors and to a lesser degree also for desktop processors. RISC-V is an open-source hardware instruction set architecture (ISA). Similarly to how X86 for Intel and AMD is a closed source ISA. Being an open-source ISA any manufacturer can…
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Assembler dev meeting #15
2019/09/28 meeting in cityu. We soonly clear up all combination of ADC instruction. Updated the testing web https://www.quantr.hk/asmweb
Assembler dev meeting #14
2019/09/21, as usual, heading to our first milestone. Enhanced the full test output, added two filters. Filter out by instruction or by error. http://www.quantr.hk/wp-content/plugins/NasmWeb/public//viewOutput.php?path=/home/gitlab-runner/output/output_300588484.html Jenny and Kelvin is clearing the ADC instruction Desmond is extending https://gitlab.com/quantr/toolchain/quantr-executable-library to support Windows PE format
Assembler dev meeting #13
2019/09/14, we met in cityu again. I finished IMM in other project https://gitlab.com/quantr/toolchain/antlr-calculator-library . So Assembler’s parser will eat up the whole numeric string and then pass it to antlr-calculator-library, if it contains a maths expression, it return the final answer which is a number. I created another library to produce ELF output. Jenny and…
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強烈推介, 深圳小脚丫fpga
https://detail.tmall.com/item.htm?id=589934876916&ali_refid=a3_430620_1006:1213910051:N:kUYNEKediVRtRcfPZeogQz+fixtE0nqV:4c45447dff14948a212296ee9fa615a2&ali_trackid=1_4c45447dff14948a212296ee9fa615a2&spm=a230r.1.14.1 主要好處是: 面積細 一條USB搞定, 不用其它Jtag Lattice Diamond好易上手, 至少比Quartus和Vivago更易
Assembler dev meeting #10
As usual, #10 meeting was hold in CityU. We getting more familiar with Intel basic instruction set translating. Here is the actions list for next week: Zero padding, cut of pad “0” Jenny consolidate your code into well format, let us understand and give us tutorial next sat morning Desmond: nasm in linux example, able…
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Assembler Dev Meeting #9 2019/08/16
Meeting #9come up with these fixes: Kelvin fix 66 67 REX Prefix Ending bytes (displacement) Desmond fix IMM* > IMM https://gitlab.com/quantr/toolchain/Assembler/issues/28
Why Multisim sometime is 100% accurate than calculation, sometimes is not
This exercise is 100% same as calculation But below one is not 100% same as calculation, it use just same components: VC + Resistors. Is multisim using brute force to guess out the voltage and current values?
C compiler pre-research preparation
Antlr C11 grammar is highly match with the C11 language specification, which is a very good news to us. https://github.com/antlr/grammars-v4/blob/master/c/C.g4
THE 6TH ASSEMBLER DEV MEETING
Peter updated netbeans-antlr plugin, increase our productivity: Jenny finished the REX.W translate, she keeps translating other instructions to see if our current coding facilities enough or not. Desmond is adding all the rest of the intel instructions to the grammar file, still need sometimes.
Ebook: Custom chips for dummies
https://peter.quantr.hk/wp-content/uploads/2019/07/custom-chips-for-dummies-arm.pdf
