module blink (
    input      clk_i,
    output reg led_o
);
localparam MAX = 1_200_000;
module blink (output reg led, input clk);
  localparam CNT_RST = 2_000_000;
  reg [24:0] counter;
  always @(posedge clk) begin
    if (counter == 25'd0) begin
      led <= led + 1;
      counter <= CNT_RST;
    end
    else begin
      counter <= counter - 1;
    end
  end
endmodule

LOCATE COMP "clk" SITE "P6";
IOBUF PORT "clk" IO_TYPE=LVCMOS33;
FREQUENCY PORT "clk" 25 MHZ;

LOCATE COMP "led" SITE "P2";
IOBUF PORT "led" IO_TYPE=LVCMOS33;

2022/02/27 by admin